From: Marek Vasut <marex@denx.de>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCHv4 9/9] arm: socfpga: fix up a questionable macro for SDMMC
Date: Thu, 3 Dec 2015 03:52:39 +0100 [thread overview]
Message-ID: <201512030352.40036.marex@denx.de> (raw)
In-Reply-To: <1449084693-942-10-git-send-email-dinguyen@opensource.altera.com>
On Wednesday, December 02, 2015 at 08:31:33 PM, dinguyen at opensource.altera.com
wrote:
> From: Dinh Nguyen <dinguyen@opensource.altera.com>
>
> Move the macro into the socfpga_dwmci_clksel().
>
> Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
> ---
> v2: add SYSMGR_SDMMC_DRVSEL_SHIFT
> s/SYSMGR_SDMMC_SMPSEL_SHIFT/SYSMGR_SDMMC_SMPLSEL_SHIFT
> ---
> arch/arm/mach-socfpga/include/mach/system_manager.h | 10 +++++++---
> drivers/mmc/socfpga_dw_mmc.c | 5 +++--
> 2 files changed, 10 insertions(+), 5 deletions(-)
>
> diff --git a/arch/arm/mach-socfpga/include/mach/system_manager.h
> b/arch/arm/mach-socfpga/include/mach/system_manager.h index
> f8d9e98..e688c50 100644
> --- a/arch/arm/mach-socfpga/include/mach/system_manager.h
> +++ b/arch/arm/mach-socfpga/include/mach/system_manager.h
> @@ -201,9 +201,13 @@ struct socfpga_system_manager {
> #define SYSMGR_FPGAINTF_NAND (1 << 4)
> #define SYSMGR_FPGAINTF_SDMMC (1 << 5)
>
> -/* FIXME: This is questionable macro. */
> -#define SYSMGR_SDMMC_CTRL_SET(smplsel, drvsel) \
> - ((((drvsel) << 0) & 0x7) | (((smplsel) << 3) & 0x38))
> +#if defined(CONFIG_TARGET_SOCFPGA_GEN5)
> +#define SYSMGR_SDMMC_SMPLSEL_SHIFT 3
> +#else
> +#define SYSMGR_SDMMC_SMPLSEL_SHIFT 4
> +#endif
> +
> +#define SYSMGR_SDMMC_DRVSEL_SHIFT 0
>
> /* EMAC Group Bit definitions */
> #define SYSMGR_EMACGRP_CTRL_PHYSEL_ENUM_GMII_MII 0x0
> diff --git a/drivers/mmc/socfpga_dw_mmc.c b/drivers/mmc/socfpga_dw_mmc.c
> index 5b0c3a8..d7edec7 100644
> --- a/drivers/mmc/socfpga_dw_mmc.c
> +++ b/drivers/mmc/socfpga_dw_mmc.c
> @@ -33,6 +33,8 @@ struct dwmci_socfpga_priv_data {
> static void socfpga_dwmci_clksel(struct dwmci_host *host)
> {
> struct dwmci_socfpga_priv_data *priv = host->priv;
> + u32 sdmmc_mask = ((((priv->smplsel) & 0x7) <<
SYSMGR_SDMMC_SMPLSEL_SHIFT)
> | + ((priv->drvsel) & 0x7) << SYSMGR_SDMMC_DRVSEL_SHIFT);
After correcting the parenthesis mayhem here, applied.
Best regards,
Marek Vasut
next prev parent reply other threads:[~2015-12-03 2:52 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-12-02 19:31 [U-Boot] [PATCHv4 0/9] ARM: socfpga: Add minimal support for Arria10 dinguyen at opensource.altera.com
2015-12-02 19:31 ` [U-Boot] [PATCHv4 1/9] arm: socfpga: introduce TARGET_SOCFPGA_GEN5 config property dinguyen at opensource.altera.com
2015-12-03 2:41 ` Marek Vasut
2015-12-02 19:31 ` [U-Boot] [PATCHv4 2/9] arm: socfpga: arria10: add system manager defines dinguyen at opensource.altera.com
2015-12-03 2:42 ` Marek Vasut
2015-12-03 22:08 ` Dinh Nguyen
2015-12-03 22:57 ` Marek Vasut
2015-12-02 19:31 ` [U-Boot] [PATCHv4 3/9] arm: socfpga: arria10: add reset manager for Arria10 dinguyen at opensource.altera.com
2015-12-03 2:44 ` Marek Vasut
2015-12-03 18:51 ` Pavel Machek
2015-12-02 19:31 ` [U-Boot] [PATCHv4 4/9] arm: socfpga: arria10: add misc functions " dinguyen at opensource.altera.com
2015-12-03 2:47 ` Marek Vasut
2015-12-03 19:56 ` Dinh Nguyen
2015-12-02 19:31 ` [U-Boot] [PATCHv4 5/9] arm: socfpga: arria10: add socfpga_arria10_socdk config dinguyen at opensource.altera.com
2015-12-03 2:48 ` Marek Vasut
2015-12-02 19:31 ` [U-Boot] [PATCHv4 6/9] arm: socfpga: arria10: add socfpga_arria10_defconfig dinguyen at opensource.altera.com
2015-12-03 2:48 ` Marek Vasut
2015-12-02 19:31 ` [U-Boot] [PATCHv4 7/9] arm: socfpga: arria10: add config option build for arria10 dinguyen at opensource.altera.com
2015-12-02 19:31 ` [U-Boot] [PATCHv4 8/9] arm: socfpga: remove building scan manager dinguyen at opensource.altera.com
2015-12-03 2:49 ` Marek Vasut
2015-12-02 19:31 ` [U-Boot] [PATCHv4 9/9] arm: socfpga: fix up a questionable macro for SDMMC dinguyen at opensource.altera.com
2015-12-03 2:52 ` Marek Vasut [this message]
2015-12-03 2:59 ` [U-Boot] [PATCHv4 0/9] ARM: socfpga: Add minimal support for Arria10 Marek Vasut
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=201512030352.40036.marex@denx.de \
--to=marex@denx.de \
--cc=u-boot@lists.denx.de \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox