From mboxrd@z Thu Jan  1 00:00:00 1970
From: Marek Vasut <marex@denx.de>
Date: Mon, 7 Dec 2015 13:21:05 +0100
Subject: [U-Boot] [PATCH 1/7] net: phy: micrel: Configure
	KSZ9021/KSZ9031 skew from OF
In-Reply-To: <1449482421.2061.3.camel@altera.com>
References: <1449348111-18341-1-git-send-email-marex@denx.de>
 <1449482421.2061.3.camel@altera.com>
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On Monday, December 07, 2015 at 11:00:21 AM, Chin Liang See wrote:
> On Sat, 2015-12-05 at 21:41 +0100, Marek Vasut wrote:
> > Add code to process the KSZ9021/KSZ9031 OF props if they are present
> > and configure skew registers based on the information from the OF.
> > This code is only enabled if the DM support for ethernet is also
> > enabled.
> 
> Nice as I noticed the value in dts was not used previously.

The more important thing is that after these patchsets, it's only the DTS that 
is used, the hard-coded values are gone.

> > Signed-off-by: Marek Vasut <marex@denx.de>
> > Cc: Joe Hershberger <joe.hershberger@ni.com>
> > Cc: Chin Liang See <clsee@altera.com>
> > Cc: Dinh Nguyen <dinguyen@opensource.altera.com>

[...]

> > +	for (i = 0; i < ofcfg->grpsz; i++) {
> > +		val[i] = fdtdec_get_uint(gd->fdt_blob, dev
> > ->of_offset,
> > +					 ofcfg->grp[i], -1);
> > +		if (val[i] == -1) {
> > +			/* Default register value for KSZ9021 */
> > +			regval |= 0x7 << (4 * i);
> 
> I noticed the KSZ9031 clock skew is having 5 bit with default value 0xF
> instead 0x7. Probably this default value and bit width should part of
> structure?

Ew, this might need some more thinking then. Nice catch.

Best regards,
Marek Vasut