From mboxrd@z Thu Jan  1 00:00:00 1970
From: Marek Vasut <marex@denx.de>
Date: Tue, 22 Dec 2015 15:56:16 +0100
Subject: [U-Boot] [PATCH 2/2] arm: imx6: Enable DDR calibration on Novena
In-Reply-To: <56790A08.2050408@mail.bg>
References: <1450276807-8960-1-git-send-email-marex@denx.de>
 <201512220226.41529.marex@denx.de> <56790A08.2050408@mail.bg>
Message-ID: <201512221556.16949.marex@denx.de>
List-Id: <u-boot.lists.denx.de>
MIME-Version: 1.0
Content-Type: text/plain; charset="us-ascii"
Content-Transfer-Encoding: 7bit
To: u-boot@lists.denx.de

On Tuesday, December 22, 2015 at 09:30:00 AM, Nikolay Dimitrov wrote:
> Hi Marek,
> 
> On 12/22/2015 03:26 AM, Marek Vasut wrote:
> > On Sunday, December 20, 2015 at 08:33:58 PM, Eric Nelson wrote:
> >> Hi Marek,
> >> 
> >> On 12/16/2015 07:40 AM, Marek Vasut wrote:
> >>> Enable the DDR calibration functionality on Novena to deal with the
> >>> memory SoDIMM on this board.
> >> 
> >> Shouldn't this be in two patches?
> > 
> > Not really, the old values work without the enabled calibration. This
> > change needs to be done atomically.
> > 
> > [...]
> > 
> >>>   static void ccgr_init(void)
> >>> 
> >>> @@ -601,6 +601,11 @@ void board_init_f(ulong dummy)
> >>> 
> >>>   	mx6dq_dram_iocfg(64, &novena_ddr_ioregs, &novena_grp_ioregs);
> >>>   	mx6_dram_cfg(&novena_ddr_info, &novena_mmdc_calib,
> >>>   	&elpida_4gib_1600);
> >>> 
> >>> +	/* Perform DDR DRAM calibration */
> >>> +	udelay(100);
> >> 
> >> Shouldn't the return values be tested?
> > 
> > I guess yes, but if the calibration fails, that what ? It's game over ;-)
> 
> Do you think it's possible/practical to reboot the system in this case?

Well, you can call hang() , that's how we've been handling critical failures.

Best regards,
Marek Vasut