From: Marek Vasut <marex@denx.de>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH] arm: socfpga: Fix QSPI doesn't work on socdk board
Date: Wed, 23 Dec 2015 04:04:11 +0100 [thread overview]
Message-ID: <201512230404.11352.marex@denx.de> (raw)
In-Reply-To: <1450838305.1946.12.camel@altera.com>
On Wednesday, December 23, 2015 at 03:38:25 AM, Chin Liang See wrote:
> On Wed, 2015-12-23 at 10:29 +0800, Chin Liang See wrote:
> > On Wed, 2015-12-23 at 03:27 +0100, Marek Vasut wrote:
> > > On Wednesday, December 23, 2015 at 03:26:07 AM, ?? ? wrote:
> [..]
>
> > > > Hi Marek,
> > > >
> > > > Pin mux settings has error, set EMACIO[1-8] [10-13] from 3 to 2,
> > > > then usb
> > > > works,
> > > >
> > > > => usb start
> > > > starting USB...
> > > > USB0: Core Release: 2.93a
> > > > scanning bus 0 for devices... 2 USB Device(s) found
> > > > => usb tree
> > > > USB device tree:
> > > > 1 Hub (480 Mb/s, 0mA)
> > > >
> > > > > U-Boot Root Hub
> > > >
> > > > +-2 Mass Storage (480 Mb/s, 98mA)
> > > > Generic USB Storage 000000000272
> > >
> > > Cool, thanks! Patch please ;-)
> >
> > Nice, guess Altera email is very slow
>
> Yup, it work for me too with the pinmux change and dcache on.
>
> U-Boot SPL 2016.01-rc2-09121-gc339ea5-dirty (Dec 23 2015 - 10:21:29)
> drivers/ddr/altera/sequencer.c: Preparing to start memory calibration
> drivers/ddr/altera/sequencer.c: CALIBRATION PASSED
> drivers/ddr/altera/sequencer.c: Calibration complete
> Trying to boot from MMC
> spl: mmc boot mode: raw
>
>
> U-Boot 2016.01-rc2-09121-gc339ea5-dirty (Dec 23 2015 - 10:21:29 +0800)
>
> CPU: Altera SoCFPGA Platform
> FPGA: Altera Cyclone V, SE/A6 or SX/C6 or ST/D6, version 0x0
> BOOT: SD/MMC External Transceiver (1.8V)
> Watchdog enabled
> I2C: ready
> DRAM: 1 GiB
> MMC: dwmmc0 at ff704000: 0
> *** Warning - bad CRC, using default environment
>
> In: serial
> Out: serial
> Err: serial
> Model: Altera SOCFPGA Cyclone V SoC Development Kit
> Net:
> Error: ethernet at ff702000 address not set.
> No ethernet found.
> Hit any key to stop autoboot: 0
> => dcache
> Data (writethrough) Cache is ON
> => usb reset
> resetting USB...
> USB0: Core Release: 2.93a
> scanning bus 0 for devices... 2 USB Device(s) found
> => usb info
> 1: Hub, USB Revision 1.10
> - U-Boot Root Hub
> - Class: Hub
> - PacketSize: 8 Configurations: 1
> - Vendor: 0x0000 Product 0x0000 Version 0.0
> Configuration: 1
> - Interfaces: 1 Self Powered 0mA
> Interface: 0
> - Alternate Setting 0, Endpoints: 1
> - Class Hub
> - Endpoint 1 In Interrupt MaxPacket 2 Interval 255ms
>
> 2: Mass Storage, USB Revision 2.0
> - USB DISK 2.0 0781076602A6
> - Class: (from Interface) Mass Storage
> - PacketSize: 64 Configurations: 1
> - Vendor: 0x13fe Product 0x1e00 Version 1.16
> Configuration: 1
> - Interfaces: 1 Bus Powered 200mA
> Interface: 0
> - Alternate Setting 0, Endpoints: 2
> - Class Mass Storage, Transp. SCSI, Bulk only
> - Endpoint 1 In Bulk MaxPacket 512
> - Endpoint 2 Out Bulk MaxPacket 512
Cool, I will pick the patch shortly.
next prev parent reply other threads:[~2015-12-23 3:04 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-12-23 2:26 [U-Boot] [PATCH] arm: socfpga: Fix QSPI doesn't work on socdk board 圣江 吴
2015-12-23 2:27 ` Marek Vasut
2015-12-23 2:29 ` Chin Liang See
2015-12-23 2:38 ` Chin Liang See
2015-12-23 3:04 ` Marek Vasut [this message]
[not found] <18c117d0-3bdb-4cf8-972a-35711ec3eacf@me.com>
2015-12-23 1:26 ` Marek Vasut
-- strict thread matches above, loose matches on Subject: below --
2015-12-23 1:22 圣江 吴
2015-12-23 1:24 ` Marek Vasut
2015-12-23 2:02 ` ShengjiangWu
2015-12-23 2:07 ` Marek Vasut
2015-12-23 2:27 ` Chin Liang See
2015-12-22 9:18 shengjiangwu
2015-12-22 9:36 ` Chin Liang See
2015-12-22 20:19 ` Marek Vasut
2015-12-22 20:33 ` Marek Vasut
2015-12-21 7:33 圣江 吴
2015-12-21 9:37 ` Pavel Machek
2015-12-21 9:56 ` Chin Liang See
2015-12-21 10:12 ` Marek Vasut
2015-12-21 10:12 ` Marek Vasut
2015-12-21 10:41 ` Pavel Machek
2015-12-21 14:49 ` Marek Vasut
2015-12-18 7:57 圣江 吴
2015-12-18 12:37 ` Marek Vasut
2015-12-18 7:21 shengjiangwu
2015-12-18 7:44 ` Chin Liang See
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