From mboxrd@z Thu Jan 1 00:00:00 1970 From: Siarhei Siamashka Date: Wed, 23 Dec 2015 16:56:27 +0200 Subject: [U-Boot] [linux-sunxi] Re: PSCI for H3 In-Reply-To: References: <564B3A7E.6040800@gmail.com> <20151223121415.050a3955@i7> Message-ID: <20151223165627.1989be39@i7> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On Wed, 23 Dec 2015 22:36:19 +0800 Chen-Yu Tsai wrote: > On Wed, Dec 23, 2015 at 6:14 PM, Siarhei Siamashka > wrote: > > On Tue, 17 Nov 2015 15:32:30 +0100 > > Jens Kuske wrote: > > > >> On 16/11/15 07:26, Chen-Yu Tsai wrote: > >> > Hi everyone, > >> > > >> > I got my Orange Pi PC booting U-boot now, using Hans' sunxi-wip branch that > >> > includes Jens' patches. > >> > > >> > For PSCI and SMP, it seems the H3 follows the structure of previous sun8i SoCs. > >> > The CPUCFG registers line up. The manual doesn't have the PRCM, so I'll have to > >> > dig through the SDK. > >> > > >> > One other thing is the SMTA, or Secure Memory Touch Arbiter, which we last > >> > encountered issues with on the A31s. This controls non-secure access to a whole > >> > bunch of peripherals, which we'll need to enable for Linux to run non-secure. > >> > >> There is also register 0x2f0 in the CCU, it defaults to disabling > >> non-secure access to all clock registers. > >> > >> Jens > >> > > > > How about just enabling SMP on Allwinner H3 in an old unfashionable way > > while all these non-secure access limiters are still being under > > investigation? > > I'm not against it, though I was considering removing the SMP code. > > BTW, without docs on the PRCM, do we know if the H3 has the same power clamps > as the A31? FYI the A23 SMP code is the same as A31, just without the power > clamps. Yes. I inspected the kernel sources from the Allwinner SDK and it looks like A31 and H3 are taking exactly the same code path (using the same ifdef guards everywhere): https://github.com/allwinner-zh/linux-3.4-sunxi/blob/55599b8209bb7150140e4d45ef460dbff6c876dd/arch/arm/mach-sunxi/include/mach/sun8i/platsmp.h#L124-L139 "SUN8IW1 = A31" and "SUN8IW7 = H3" according to http://linux-sunxi.org/Allwinner_SoC_Family#2013_naming_scheme_change I'll also try to see if I can get PSCI working on H3, but it seems to be a real PITA to debug. Also some parts of the H3 documentation are missing (PRCM is a good example) and if there happens to be an undocumented configuration knob responsible to allowing non-secure access to some important resource, then we hit a brick wall... -- Best regards, Siarhei Siamashka