From: Marek Vasut <marex@denx.de>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH v3 1/4] mips: add base support for atheros ath79 based SOCs
Date: Sun, 27 Dec 2015 13:25:52 +0100 [thread overview]
Message-ID: <201512271325.53078.marex@denx.de> (raw)
In-Reply-To: <567FCD81.2060605@gmail.com>
On Sunday, December 27, 2015 at 12:37:37 PM, Daniel Schwierzeck wrote:
> Am 27.12.2015 um 12:04 schrieb Marek Vasut:
> > On Sunday, December 27, 2015 at 11:18:25 AM, Wills Wang wrote:
> >> On 12/27/2015 06:09 PM, Marek Vasut wrote:
> >>> On Sunday, December 27, 2015 at 09:07:36 AM, Wills Wang wrote:
> >>>> On 12/27/2015 03:38 PM, Marek Vasut wrote:
> >>>>> On Sunday, December 27, 2015 at 08:33:26 AM, Wills Wang wrote:
> >>>>>> On 12/27/2015 02:37 AM, Marek Vasut wrote:
> >>>>>>> On Saturday, December 26, 2015 at 07:29:51 PM, Wills Wang wrote:
> >>>>>>>> WASP is ar9341.
> >>>>>>>
> >>>>>>> Please do not top post.
> >>>>>>>
> >>>>>>> Did you try if the memory is accessible on your platform ? AR9331 I
> >>>>>>> have here has the SRAM at 0xbd007000 , just like that machine in
> >>>>>>> [1] .
> >>>>>>
> >>>>>> I found there is a memory segment at 0xbd000000...0xbd007fff. it's
> >>>>>> independent of DDR physical memory, can be read and wrote, but
> >>>>>> hardware can't boot up if don't execute lowlevel_init.S when define
> >>>>>> CONFIG_SYS_INIT_SP_ADDR=0xbd007000 to set C stack into SRAM.
> >>>>>
> >>>>> Stack grows down, so of course if you put stack at the beginning of
> >>>>> SRAM, that cannot work ;-) Put it at the end , 0xbd008000.
> >>>>
> >>>> This memory segment was mapped circularly at 0xbd000000...0xbdffffff.
> >>>
> >>> So is this area at 0xbd008000 usable for stack or not ?
> >>
> >> Same times board can boot up, but in a very unstable. i use the
> >> following setting:
> >>
> >> #define CONFIG_SYS_INIT_RAM_ADDR 0xbd000000
> >
> > Should be 0xbd007000
> >
> >> #define CONFIG_SYS_INIT_RAM_SIZE (32 * SZ_1K)
> >
> > Should be 4 KiB large.
> >
> >> #define CONFIG_SYS_INIT_SP_OFFSET \
> >>
> >> (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
> >>
> >> #define CONFIG_SYS_INIT_SP_ADDR \
> >>
> >> (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
> >
> > Did you investigate why the board has problems ?
>
> according to the description above by Wills those three defines setup
> the values correctly for start.S:
>
> #define CONFIG_SYS_INIT_RAM_ADDR 0xbd000000
> #define CONFIG_SYS_INIT_RAM_SIZE (32 * SZ_1K)
> #define CONFIG_SYS_INIT_SP_ADDR \
> (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_SIZE)
>
> The stack pointer will then be set to the end of the SRAM area with a 16
> Byte alignment. The resulting address should be 0xbd007ff0. From this
> address, the size of gd_t and CONFIG_SYS_MALLOC_F_LEN will be
> subtracted. The remaining space is available for the initial stack.
>
> Which value did you chose for CONFIG_SYS_MALLOC_F_LEN? It must be big
> enough to satisfy all malloc requests by the DM stack and small enough
> to fit in 32k minus stack size and gd_t size.
Careful about those 32k, I think the code which I referenced only uses 4k area.
> Important note: do net set CONFIG_SKIP_LOWLEVEL_INIT yet because that
> leaves you without initialized RAM or caches. If the setup does not work
> yet, you likely need to init some extra bits to make the SRAM working.
Best regards,
next prev parent reply other threads:[~2015-12-27 12:25 UTC|newest]
Thread overview: 39+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <1450956123-17606-1-git-send-email-wills.wang@live.com>
2015-12-24 11:22 ` [U-Boot] [PATCH v3 1/4] mips: add base support for atheros ath79 based SOCs Wills Wang
2015-12-24 11:52 ` Marek Vasut
2015-12-24 13:51 ` Wills Wang
2015-12-24 15:12 ` Marek Vasut
2015-12-25 11:38 ` Wills Wang
2015-12-26 6:02 ` Marek Vasut
2015-12-26 15:48 ` Wills Wang
2015-12-26 17:35 ` Marek Vasut
2015-12-26 18:17 ` Marek Vasut
2015-12-26 18:29 ` Wills Wang
2015-12-26 18:37 ` Marek Vasut
2015-12-27 7:33 ` Wills Wang
2015-12-27 7:38 ` Marek Vasut
2015-12-27 8:07 ` Wills Wang
2015-12-27 10:09 ` Marek Vasut
2015-12-27 10:18 ` Wills Wang
2015-12-27 11:04 ` Marek Vasut
2015-12-27 11:37 ` Wills Wang
2015-12-27 12:27 ` Marek Vasut
2015-12-28 11:17 ` Wills Wang
2015-12-28 13:47 ` Marek Vasut
2015-12-28 15:36 ` Wills Wang
2015-12-28 15:48 ` Wills Wang
2015-12-28 15:52 ` Marek Vasut
2015-12-28 17:08 ` Daniel Schwierzeck
2015-12-28 17:33 ` Marek Vasut
2015-12-27 11:37 ` Daniel Schwierzeck
2015-12-27 12:25 ` Marek Vasut [this message]
2015-12-27 13:17 ` Wills Wang
2015-12-24 11:22 ` [U-Boot] [PATCH v3 2/4] mips: ath79: add serial driver for ar933x SOC Wills Wang
2015-12-25 2:39 ` Thomas Chou
2015-12-25 6:05 ` Wills Wang
2015-12-25 6:48 ` Thomas Chou
2015-12-25 2:49 ` Thomas Chou
2016-01-06 0:25 ` Simon Glass
2016-01-06 2:58 ` Wills Wang
2015-12-24 11:22 ` [U-Boot] [PATCH v3 3/4] mips: ath79: add spi driver Wills Wang
2015-12-24 11:55 ` Marek Vasut
2015-12-24 11:22 ` [U-Boot] [PATCH v3 4/4] mips: ath79: add AP121 reference board Wills Wang
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