[U-Boot] [linux-sunxi] Re: PSCI for H3

[Maxime Ripard <maxime.ripard@free-electrons.com>]

On Wed, Dec 23, 2015 at 12:14:15PM +0200, Siarhei Siamashka wrote:
> On Tue, 17 Nov 2015 15:32:30 +0100
> Jens Kuske <jenskuske@gmail.com> wrote:
> 
> > On 16/11/15 07:26, Chen-Yu Tsai wrote:
> > > Hi everyone,
> > > 
> > > I got my Orange Pi PC booting U-boot now, using Hans' sunxi-wip branch that
> > > includes Jens' patches.
> > > 
> > > For PSCI and SMP, it seems the H3 follows the structure of previous sun8i SoCs.
> > > The CPUCFG registers line up. The manual doesn't have the PRCM, so I'll have to
> > > dig through the SDK.
> > > 
> > > One other thing is the SMTA, or Secure Memory Touch Arbiter, which we last
> > > encountered issues with on the A31s. This controls non-secure access to a whole
> > > bunch of peripherals, which we'll need to enable for Linux to run non-secure.  
> > 
> > There is also register 0x2f0 in the CCU, it defaults to disabling
> > non-secure access to all clock registers.
> > 
> > Jens
> > 
> 
> How about just enabling SMP on Allwinner H3 in an old unfashionable way
> while all these non-secure access limiters are still being under
> investigation?

I'd really prefer not to.

This ends up being dead code that no-one uses, but we can't really
remove. Adding support for the H3 support would only delay that
removal once again.

What controller are you having issues accessing?

Thanks,
Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
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