[U-Boot] [PATCH v3 1/4] mips: add base support for atheros ath79 based SOCs

Wills Wang
2015-12-27T08:07:36Z

On 12/27/2015 03:38 PM, Marek Vasut wrote:
> On Sunday, December 27, 2015 at 08:33:26 AM, Wills Wang wrote:
>> On 12/27/2015 02:37 AM, Marek Vasut wrote:
>>> On Saturday, December 26, 2015 at 07:29:51 PM, Wills Wang wrote:
>>>> WASP is ar9341.
>>> Please do not top post.
>>>
>>> Did you try if the memory is accessible on your platform ? AR9331 I have
>>> here has the SRAM at 0xbd007000 , just like that machine in [1] .
>> I found there is a memory segment at 0xbd000000...0xbd007fff. it's
>> independent of DDR physical memory, can be read and wrote, but
>> hardware can't boot up if don't execute lowlevel_init.S when define
>> CONFIG_SYS_INIT_SP_ADDR=0xbd007000 to set C stack into SRAM.
> Stack grows down, so of course if you put stack at the beginning of SRAM,
> that cannot work ;-) Put it at the end , 0xbd008000.
This memory segment was mapped circularly at 0xbd000000...0xbdffffff.
> Best regards,
> Marek Vasut
>
>