From: Marek Vasut <marex@denx.de>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH v5 4/5] mips: ath79: add spi driver
Date: Wed, 30 Dec 2015 09:55:50 +0100 [thread overview]
Message-ID: <201512300955.50639.marex@denx.de> (raw)
In-Reply-To: <20151230113252.b3b00ee1758808bf086322e4@gmail.com>
On Wednesday, December 30, 2015 at 09:32:52 AM, Antony Pavlov wrote:
> On Wed, 30 Dec 2015 01:51:47 +0100
>
> Marek Vasut <marex@denx.de> wrote:
> > On Wednesday, December 30, 2015 at 12:46:23 AM, Thomas Chou wrote:
> > > Hi Marek,
> > >
> > > On 2015?12?29? 21:25, Marek Vasut wrote:
> > > > On Tuesday, December 29, 2015 at 02:00:27 PM, Thomas Chou wrote:
> > > >> Hi Wills,
> > > >>
> > > >> On 2015?12?29? 19:17, Wills Wang wrote:
> > > >>> diff --git a/arch/mips/mach-ath79/Kconfig
> > > >>> b/arch/mips/mach-ath79/Kconfig index 1d92a5b..b5668e9 100644
> > > >>> --- a/arch/mips/mach-ath79/Kconfig
> > > >>> +++ b/arch/mips/mach-ath79/Kconfig
> > > >>> @@ -15,6 +15,7 @@ config SOC_AR933X
> > > >>>
> > > >>> select SYS_MIPS_CACHE_INIT_RAM_LOAD
> > > >>> select MIPS_TUNE_24KC
> > > >>> select AR933X_UART
> > > >>>
> > > >>> + select ATH79_SPI
> > > >>
> > > >> Both AR933X_UART and ATH79_SPI should not be selected with mach
> > > >> Kconfig. They should go with board defconfig.
> > > >>
> > > >>> diff --git a/drivers/spi/ath79_spi.c b/drivers/spi/ath79_spi.c
> > > >>>
> > > >>> +static inline void ath79_spi_delay(int max_hz)
> > > >>> +{
> > > >>> + uint64_t tick = get_tbclk();
> > > >>> +
> > > >>> + do_div(tick, max_hz);
> > > >>> + tick = get_ticks() + tick + 1; /* get current timestamp */
> > > >>> + while (get_ticks() < tick) /* loop till event */
> > > >>> + /*NOP*/;
> > > >>> +}
> > > >>
> > > >> Use udelay() instead.
> > > >
> > > > You mean get_timer() based delay loop, yes ?
> > >
> > > Sorry, my mistake. Just realized that we don't have nano delay yet. The
> > > code above is fine.
> >
> > Just skimming through the code, it seems like bitbanging the SPI using
> > the generic soft-spi driver might be easier ;-/
>
> AR9331 SPI controller has special shift register for reading received data,
> so you have no need in reading every single receiving MISO bit with
> separate gpio access, this can give a small speedup. Next, in openwrt tree
> there is a dirty-hacky ath79-spi linux kernel patch for very impressive
> SPI flash read speedup (2 MiB/s instead of 20 KiB/s, I have no precise
> bandwidth results at the moment).
> So for better performance it is reasonable to have separate ath79-spi
> driver.
OK
Best regards,
Marek Vasut
next prev parent reply other threads:[~2015-12-30 8:55 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <1451387833-932-1-git-send-email-wills.wang@live.com>
2015-12-29 11:17 ` [U-Boot] [PATCH v5 1/5] mips: implement to access the KSEG0/1 memory range in map_physmem Wills Wang
2015-12-29 12:49 ` Antony Pavlov
2015-12-30 1:08 ` Wills Wang
2015-12-29 18:08 ` Daniel Schwierzeck
2015-12-29 11:17 ` [U-Boot] [PATCH v5 2/5] mips: add support for QCA/Atheros ath79 SOCs Wills Wang
2015-12-29 19:09 ` Daniel Schwierzeck
2015-12-30 6:27 ` Wills Wang
2015-12-29 11:17 ` [U-Boot] [PATCH v5 3/5] mips: ath79: add serial driver for ar933x SOC Wills Wang
2015-12-29 12:26 ` Thomas Chou
2015-12-30 1:06 ` Wills Wang
2015-12-29 11:17 ` [U-Boot] [PATCH v5 4/5] mips: ath79: add spi driver Wills Wang
2015-12-29 13:00 ` Thomas Chou
2015-12-29 13:25 ` Marek Vasut
2015-12-29 23:46 ` Thomas Chou
2015-12-30 0:51 ` Marek Vasut
2015-12-30 4:02 ` Thomas Chou
2015-12-30 8:32 ` Antony Pavlov
2015-12-30 8:55 ` Marek Vasut [this message]
2015-12-30 1:35 ` Wills Wang
2015-12-30 1:46 ` Marek Vasut
2015-12-30 1:12 ` Wills Wang
2015-12-29 11:17 ` [U-Boot] [PATCH v5 5/5] mips: ath79: add AP121 reference board Wills Wang
2015-12-29 19:27 ` Daniel Schwierzeck
2015-12-30 6:31 ` Wills Wang
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