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From: Marek Vasut <marex@denx.de>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCHv2 1/3] arm: socfpga: add reset manager defines for Arria10
Date: Wed, 13 Jan 2016 21:37:55 +0100	[thread overview]
Message-ID: <201601132137.55613.marex@denx.de> (raw)
In-Reply-To: <56968944.7070605@kernel.org>

On Wednesday, January 13, 2016 at 06:28:36 PM, Dinh Nguyen wrote:
> On 01/12/2016 08:04 PM, Marek Vasut wrote:
> > On Wednesday, January 13, 2016 at 02:58:42 AM, Chin Liang See wrote:
> >> On Tue, 2016-01-12 at 23:16 +0100, Marek Vasut wrote:
> >>> On Tuesday, January 12, 2016 at 11:11:42 PM, Dinh Nguyen wrote:
> >>>> On 01/12/2016 04:02 PM, Marek Vasut wrote:
> >>>>> On Tuesday, January 12, 2016 at 09:56:42 PM,
> >>>>> dinguyen at opensource.altera.com
> >>>>> 
> >>>>> wrote:
> >>>>>> From: Dinh Nguyen <dinguyen@opensource.altera.com>
> >>>>>> 
> >>>>>> Add the Arria10 reset manager defines that is used in Linux.
> >>>>>> Change the
> >>>>>> license to SPDX.
> >>>>>> 
> >>>>>> [commit 007bb689b3dbad83cdab0ad192bc6ed0162451e0 from the Linux
> >>>>>> kernel]
> >>>>>> 
> >>>>>> Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
> >>>>> 
> >>>>> Applied all three to u-boot-socfpga/02-arria10 , thanks!
> >>>>> 
> >>>>> btw what's the status of A10 ? What will I be able to compile it
> >>>>> (and
> >>>>> thus merge the stuff into mainline and ev. use it on actual A10)
> >>>>> ? A
> >>>>> board would be nice too ;-)
> >>>> 
> >>>> Here is my list of to-do that is left for A10:
> >>>> 
> >>>> - submit SDRAM controller
> >>>> - rework FPGA manager for A10
> >>>> - port an SPL for A10
> >>>> 
> >>>> I think the most work will be the SDRAM controller as it needs
> >>>> quite a
> >>>> bit of cleanup. I'm about ~25% through with that.
> >>> 
> >>> Didn't you mention that you use nios2 that magically does that init
> >>> for you?
> >>> Shall I expect thousands of LoC SDRAM controller driver again or is
> >>> there
> >>> something "lighter" coming up ? ;-)
> >> 
> >> Yah it should be lighter as all SDRAM configuration now part of
> >> bitstream. Driver just need to derive the value from bitstream register
> >> and setup the DDR controller. No more DDR handoff.
> > 
> > Whew :)
> 
> While all of the above is true, the *crap* that is in the current
> implementation needs to get cleaned up. It's amazing to me how
> we(Altera) continue to go down this path of having to do things twice,
> instead of trying to upstream first!

You'll soon be doing them thrice *smirk* , or maybe you already do ;-)

> >>>> As for HW, I'll see what I can do.
> >>> 
> >>> Don't worry about it too much. I also poked Chin about it some time
> >>> ago, but
> >>> I dunno where he got with this.
> >> 
> >> I am still working on this. We have limited boards as we will be
> >> getting production board in a month time. Dinh, you have any boards to
> >> spare? Most of boards here already went into test farms.
> > 
> > I'll wait for the production ones , no need to hurry :)
> 
> That's probably best. I do have an extra Rev A hardware, but trust me,
> you don't want to have anything do with that hardware.

You can save one collector's edition for me, it'd look nice right next to
the Excalibur XA10 ;-D

  reply	other threads:[~2016-01-13 20:37 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-01-12 20:56 [U-Boot] [PATCHv2 1/3] arm: socfpga: add reset manager defines for Arria10 dinguyen at opensource.altera.com
2016-01-12 20:56 ` [U-Boot] [PATCH 2/3] arm: socfpga: combine clrbits/setbits into a single clrsetbits dinguyen at opensource.altera.com
2016-01-12 20:56 ` [U-Boot] [PATCHv2 3/3] arm: socfpga: arria10: update dwmac reset function to support Arria10 dinguyen at opensource.altera.com
2016-01-12 22:02 ` [U-Boot] [PATCHv2 1/3] arm: socfpga: add reset manager defines for Arria10 Marek Vasut
2016-01-12 22:11   ` Dinh Nguyen
2016-01-12 22:16     ` Marek Vasut
2016-01-13  1:58       ` Chin Liang See
2016-01-13  2:04         ` Marek Vasut
2016-01-13 17:28           ` Dinh Nguyen
2016-01-13 20:37             ` Marek Vasut [this message]
2016-02-04 11:46 ` Marek Vasut
2016-02-04 20:59   ` Dinh Nguyen
2016-02-06  7:43     ` Marek Vasut

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