From mboxrd@z Thu Jan  1 00:00:00 1970
From: Peng Fan <van.freenix@gmail.com>
Date: Mon, 25 Jan 2016 20:52:11 +0800
Subject: [U-Boot] [PATCH] nand: mxs: fix error handling for mxs_nand_init
In-Reply-To: <1452345833-15411-1-git-send-email-van.freenix@gmail.com>
References: <1452345833-15411-1-git-send-email-van.freenix@gmail.com>
Message-ID: <20160125125209.GA13222@linux-7smt.suse>
List-Id: <u-boot.lists.denx.de>
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To: u-boot@lists.denx.de

Hi Scott,

Gentle ping.. it's a few weeks since patch sent out.

Thanks,
Peng.

On Sat, Jan 09, 2016 at 09:23:53PM +0800, Peng Fan wrote:
>From: Peng Fan <peng.fan@nxp.com>
>
>Fix error handling for mxs_nand_init.
>
>The original error handling is wrong for err2 and err1.
>Should first free desc[x], then free desc.
>
>This patch also correctly handle err3, should use
>MXS_DMA_CHANNEL_AHB_APBH_GPMI0 as the check point.
>
>Signed-off-by: Peng Fan <peng.fan@nxp.com>
>Cc: Stefano Babic <sbabic@denx.de>
>CC: Fabio Estevam <Fabio.Estevam@freescale.com>
>Cc: Scott Wood <scottwood@freescale.com>
>Signed-off-by: Peng Fan <peng.fan@nxp.com>
>---
> drivers/mtd/nand/mxs_nand.c | 24 +++++++++++++++---------
> 1 file changed, 15 insertions(+), 9 deletions(-)
>
>diff --git a/drivers/mtd/nand/mxs_nand.c b/drivers/mtd/nand/mxs_nand.c
>index f15cf36..5102e4b 100644
>--- a/drivers/mtd/nand/mxs_nand.c
>+++ b/drivers/mtd/nand/mxs_nand.c
>@@ -1090,24 +1090,29 @@ int mxs_nand_init(struct mxs_nand_info *info)
> 		(struct mxs_gpmi_regs *)MXS_GPMI_BASE;
> 	struct mxs_bch_regs *bch_regs =
> 		(struct mxs_bch_regs *)MXS_BCH_BASE;
>-	int i = 0, j;
>+	int i = 0, j, ret = 0;
> 
> 	info->desc = malloc(sizeof(struct mxs_dma_desc *) *
> 				MXS_NAND_DMA_DESCRIPTOR_COUNT);
>-	if (!info->desc)
>+	if (!info->desc) {
>+		ret = -ENOMEM;
> 		goto err1;
>+	}
> 
> 	/* Allocate the DMA descriptors. */
> 	for (i = 0; i < MXS_NAND_DMA_DESCRIPTOR_COUNT; i++) {
> 		info->desc[i] = mxs_dma_desc_alloc();
>-		if (!info->desc[i])
>+		if (!info->desc[i]) {
>+			ret = -ENOMEM;
> 			goto err2;
>+		}
> 	}
> 
> 	/* Init the DMA controller. */
> 	for (j = MXS_DMA_CHANNEL_AHB_APBH_GPMI0;
> 		j <= MXS_DMA_CHANNEL_AHB_APBH_GPMI7; j++) {
>-		if (mxs_dma_init_channel(j))
>+		ret = mxs_dma_init_channel(j);
>+		if (ret)
> 			goto err3;
> 	}
> 
>@@ -1127,15 +1132,16 @@ int mxs_nand_init(struct mxs_nand_info *info)
> 	return 0;
> 
> err3:
>-	for (--j; j >= 0; j--)
>+	for (--j; j >= MXS_DMA_CHANNEL_AHB_APBH_GPMI0; j--)
> 		mxs_dma_release(j);
> err2:
>-	free(info->desc);
>-err1:
> 	for (--i; i >= 0; i--)
> 		mxs_dma_desc_free(info->desc[i]);
>-	printf("MXS NAND: Unable to allocate DMA descriptors\n");
>-	return -ENOMEM;
>+	free(info->desc);
>+err1:
>+	if (ret == -ENOMEM)
>+		printf("MXS NAND: Unable to allocate DMA descriptors\n");
>+	return ret;
> }
> 
> /*!
>-- 
>2.6.2
>