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* [U-Boot] [PATCH] armv7: add cacheline sizes where missing
@ 2016-01-26 16:40 Albert ARIBAUD
  2016-01-27  2:29 ` Tom Rini
  2016-01-27  4:10 ` Marek Vasut
  0 siblings, 2 replies; 4+ messages in thread
From: Albert ARIBAUD @ 2016-01-26 16:40 UTC (permalink / raw)
  To: u-boot

Some armv7 targets are missing a cache line size declaration.
In preparation for "arm: cache: Implement cache range check for v7"
patch, add these declarations with the appropriate value for
the target's SoC or CPU.

Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
---

 include/configs/am3517_crane.h      | 2 ++
 include/configs/am3517_evm.h        | 2 ++
 include/configs/at91-sama5_common.h | 2 ++
 include/configs/bcm_ep_board.h      | 1 +
 include/configs/cm_t35.h            | 2 ++
 include/configs/cm_t3517.h          | 2 ++
 include/configs/colibri_vf.h        | 2 ++
 include/configs/kzm9g.h             | 2 ++
 include/configs/nokia_rx51.h        | 2 ++
 include/configs/pcm052.h            | 2 ++
 include/configs/rcar-gen2-common.h  | 2 ++
 include/configs/rk3036_common.h     | 2 ++
 include/configs/rk3288_common.h     | 2 ++
 include/configs/s5p_goni.h          | 2 ++
 include/configs/smdkc100.h          | 2 ++
 include/configs/tao3530.h           | 2 ++
 include/configs/ti814x_evm.h        | 2 ++
 include/configs/ti816x_evm.h        | 2 ++
 include/configs/ti_omap3_common.h   | 5 +++++
 include/configs/tricorder.h         | 2 ++
 include/configs/vexpress_common.h   | 2 ++
 include/configs/vf610twr.h          | 2 ++
 22 files changed, 46 insertions(+)

diff --git a/include/configs/am3517_crane.h b/include/configs/am3517_crane.h
index 4ed8e00..3cc2874 100644
--- a/include/configs/am3517_crane.h
+++ b/include/configs/am3517_crane.h
@@ -13,6 +13,8 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
+#define CONFIG_SYS_CACHELINE_SIZE	64
+
 /*
  * High Level Configuration Options
  */
diff --git a/include/configs/am3517_evm.h b/include/configs/am3517_evm.h
index 23457d6..4547d7f 100644
--- a/include/configs/am3517_evm.h
+++ b/include/configs/am3517_evm.h
@@ -13,6 +13,8 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
+#define CONFIG_SYS_CACHELINE_SIZE	64
+
 /*
  * High Level Configuration Options
  */
diff --git a/include/configs/at91-sama5_common.h b/include/configs/at91-sama5_common.h
index 9db4a4f..7b06601 100644
--- a/include/configs/at91-sama5_common.h
+++ b/include/configs/at91-sama5_common.h
@@ -12,6 +12,8 @@
 
 #include <asm/hardware.h>
 
+#define CONFIG_SYS_CACHELINE_SIZE	64
+
 #define CONFIG_SYS_TEXT_BASE		0x26f00000
 
 /* ARM asynchronous clock */
diff --git a/include/configs/bcm_ep_board.h b/include/configs/bcm_ep_board.h
index 305864f..1d4869b 100644
--- a/include/configs/bcm_ep_board.h
+++ b/include/configs/bcm_ep_board.h
@@ -11,6 +11,7 @@
 
 #define CONFIG_SKIP_LOWLEVEL_INIT
 
+#define CONFIG_SYS_CACHELINE_SIZE	64
 
 /*
  * Memory configuration
diff --git a/include/configs/cm_t35.h b/include/configs/cm_t35.h
index 2dc745e..24ae14d 100644
--- a/include/configs/cm_t35.h
+++ b/include/configs/cm_t35.h
@@ -17,6 +17,8 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
+#define CONFIG_SYS_CACHELINE_SIZE	64
+
 /*
  * High Level Configuration Options
  */
diff --git a/include/configs/cm_t3517.h b/include/configs/cm_t3517.h
index 0aefec8..7a07de4 100644
--- a/include/configs/cm_t3517.h
+++ b/include/configs/cm_t3517.h
@@ -10,6 +10,8 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
+#define CONFIG_SYS_CACHELINE_SIZE	64
+
 /*
  * High Level Configuration Options
  */
diff --git a/include/configs/colibri_vf.h b/include/configs/colibri_vf.h
index 5aed3a5..dd44462 100644
--- a/include/configs/colibri_vf.h
+++ b/include/configs/colibri_vf.h
@@ -12,6 +12,8 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
+#define CONFIG_SYS_CACHELINE_SIZE	32
+
 #include <asm/arch/imx-regs.h>
 
 #define CONFIG_VF610
diff --git a/include/configs/kzm9g.h b/include/configs/kzm9g.h
index 94b0f03..d5cbb33 100644
--- a/include/configs/kzm9g.h
+++ b/include/configs/kzm9g.h
@@ -10,6 +10,8 @@
 
 #undef DEBUG
 
+#define CONFIG_SYS_CACHELINE_SIZE	32
+
 #define CONFIG_SH73A0
 #define CONFIG_KZM_A9_GT
 #define CONFIG_RMOBILE_BOARD_STRING	"KMC KZM-A9-GT"
diff --git a/include/configs/nokia_rx51.h b/include/configs/nokia_rx51.h
index b11e43a..5c41405 100644
--- a/include/configs/nokia_rx51.h
+++ b/include/configs/nokia_rx51.h
@@ -19,6 +19,8 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
+#define CONFIG_SYS_CACHELINE_SIZE 64
+
 /*
  * High Level Configuration Options
  */
diff --git a/include/configs/pcm052.h b/include/configs/pcm052.h
index 891bdb0..2628dfa 100644
--- a/include/configs/pcm052.h
+++ b/include/configs/pcm052.h
@@ -9,6 +9,8 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
+#define CONFIG_SYS_CACHELINE_SIZE	32
+
 #include <asm/arch/imx-regs.h>
 
 #define CONFIG_VF610
diff --git a/include/configs/rcar-gen2-common.h b/include/configs/rcar-gen2-common.h
index f0a3a18..f750b53 100644
--- a/include/configs/rcar-gen2-common.h
+++ b/include/configs/rcar-gen2-common.h
@@ -9,6 +9,8 @@
 #ifndef __RCAR_GEN2_COMMON_H
 #define __RCAR_GEN2_COMMON_H
 
+#define CONFIG_SYS_CACHELINE_SIZE 64
+
 #include <asm/arch/rmobile.h>
 
 #define CONFIG_CMD_DFL
diff --git a/include/configs/rk3036_common.h b/include/configs/rk3036_common.h
index d22ea74..368d046 100644
--- a/include/configs/rk3036_common.h
+++ b/include/configs/rk3036_common.h
@@ -6,6 +6,8 @@
 #ifndef __CONFIG_RK3036_COMMON_H
 #define __CONFIG_RK3036_COMMON_H
 
+#define CONFIG_SYS_CACHELINE_SIZE	32
+
 #include <asm/arch/hardware.h>
 
 #define CONFIG_SYS_NO_FLASH
diff --git a/include/configs/rk3288_common.h b/include/configs/rk3288_common.h
index ebf1ab0..427ac4b 100644
--- a/include/configs/rk3288_common.h
+++ b/include/configs/rk3288_common.h
@@ -7,6 +7,8 @@
 #ifndef __CONFIG_RK3288_COMMON_H
 #define __CONFIG_RK3288_COMMON_H
 
+#define CONFIG_SYS_CACHELINE_SIZE	64
+
 #include <asm/arch/hardware.h>
 
 #define CONFIG_SYS_NO_FLASH
diff --git a/include/configs/s5p_goni.h b/include/configs/s5p_goni.h
index 8f65d7e..f92c23d 100644
--- a/include/configs/s5p_goni.h
+++ b/include/configs/s5p_goni.h
@@ -17,6 +17,8 @@
 #define CONFIG_S5PC110		1	/* which is in a S5PC110 */
 #define CONFIG_MACH_GONI	1	/* working with Goni */
 
+#define CONFIG_SYS_CACHELINE_SIZE	64
+
 #include <linux/sizes.h>
 #include <asm/arch/cpu.h>		/* get chip and board defs */
 
diff --git a/include/configs/smdkc100.h b/include/configs/smdkc100.h
index c36e444..db79e54 100644
--- a/include/configs/smdkc100.h
+++ b/include/configs/smdkc100.h
@@ -12,6 +12,8 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
+#define CONFIG_SYS_CACHELINE_SIZE	64
+
 /*
  * High Level Configuration Options
  * (easy to change)
diff --git a/include/configs/tao3530.h b/include/configs/tao3530.h
index c1bd179..d5aba70 100644
--- a/include/configs/tao3530.h
+++ b/include/configs/tao3530.h
@@ -13,6 +13,8 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
+#define CONFIG_SYS_CACHELINE_SIZE	64
+
 /*
  * High Level Configuration Options
  */
diff --git a/include/configs/ti814x_evm.h b/include/configs/ti814x_evm.h
index e726040..3d0498d 100644
--- a/include/configs/ti814x_evm.h
+++ b/include/configs/ti814x_evm.h
@@ -16,6 +16,8 @@
 #ifndef __CONFIG_TI814X_EVM_H
 #define __CONFIG_TI814X_EVM_H
 
+#define CONFIG_SYS_CACHELINE_SIZE	64
+
 #define CONFIG_TI81XX
 #define CONFIG_TI814X
 #define CONFIG_SYS_NO_FLASH
diff --git a/include/configs/ti816x_evm.h b/include/configs/ti816x_evm.h
index ba652ca..533fae7 100644
--- a/include/configs/ti816x_evm.h
+++ b/include/configs/ti816x_evm.h
@@ -10,6 +10,8 @@
 #ifndef __CONFIG_TI816X_EVM_H
 #define __CONFIG_TI816X_EVM_H
 
+#define CONFIG_SYS_CACHELINE_SIZE	64
+
 #define CONFIG_TI81XX
 #define CONFIG_TI816X
 #define CONFIG_SYS_NO_FLASH
diff --git a/include/configs/ti_omap3_common.h b/include/configs/ti_omap3_common.h
index 02fdcdc..6a4868c 100644
--- a/include/configs/ti_omap3_common.h
+++ b/include/configs/ti_omap3_common.h
@@ -14,6 +14,11 @@
 #ifndef __CONFIG_TI_OMAP3_COMMON_H__
 #define __CONFIG_TI_OMAP3_COMMON_H__
 
+/*
+ * High Level Configuration Options
+ */
+
+#define CONFIG_SYS_CACHELINE_SIZE	64
 
 #include <asm/arch/cpu.h>
 #include <asm/arch/omap.h>
diff --git a/include/configs/tricorder.h b/include/configs/tricorder.h
index f5f5324..2ec2f01 100644
--- a/include/configs/tricorder.h
+++ b/include/configs/tricorder.h
@@ -16,6 +16,8 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
+#define CONFIG_SYS_CACHELINE_SIZE	64
+
 /* High Level Configuration Options */
 #define CONFIG_SYS_THUMB_BUILD
 #define CONFIG_OMAP			/* in a TI OMAP core */
diff --git a/include/configs/vexpress_common.h b/include/configs/vexpress_common.h
index cec510c..d78ca0b 100644
--- a/include/configs/vexpress_common.h
+++ b/include/configs/vexpress_common.h
@@ -118,6 +118,8 @@
 #define CONFIG_SYS_MEMTEST_START	V2M_BASE
 #define CONFIG_SYS_MEMTEST_END		0x20000000
 
+#define CONFIG_SYS_CACHELINE_SIZE	64
+
 #define CONFIG_CMDLINE_TAG		1	/* enable passing of ATAGs */
 #define CONFIG_SETUP_MEMORY_TAGS	1
 #define CONFIG_SYS_L2CACHE_OFF		1
diff --git a/include/configs/vf610twr.h b/include/configs/vf610twr.h
index dcfafaf..d100f73 100644
--- a/include/configs/vf610twr.h
+++ b/include/configs/vf610twr.h
@@ -9,6 +9,8 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
+#define CONFIG_SYS_CACHELINE_SIZE	32
+
 #include <asm/arch/imx-regs.h>
 
 #define CONFIG_VF610
-- 
2.5.0

^ permalink raw reply related	[flat|nested] 4+ messages in thread

* [U-Boot] [PATCH] armv7: add cacheline sizes where missing
  2016-01-26 16:40 [U-Boot] [PATCH] armv7: add cacheline sizes where missing Albert ARIBAUD
@ 2016-01-27  2:29 ` Tom Rini
  2016-01-27  4:10 ` Marek Vasut
  1 sibling, 0 replies; 4+ messages in thread
From: Tom Rini @ 2016-01-27  2:29 UTC (permalink / raw)
  To: u-boot

On Tue, Jan 26, 2016 at 05:40:49PM +0100, Albert ARIBAUD wrote:

> Some armv7 targets are missing a cache line size declaration.
> In preparation for "arm: cache: Implement cache range check for v7"
> patch, add these declarations with the appropriate value for
> the target's SoC or CPU.
> 
> Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>

For the TI boards:
Reviewed-by: Tom Rini <trini@konsulko.com>

-- 
Tom
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^ permalink raw reply	[flat|nested] 4+ messages in thread

* [U-Boot] [PATCH] armv7: add cacheline sizes where missing
  2016-01-26 16:40 [U-Boot] [PATCH] armv7: add cacheline sizes where missing Albert ARIBAUD
  2016-01-27  2:29 ` Tom Rini
@ 2016-01-27  4:10 ` Marek Vasut
  2016-01-27  7:11   ` Albert ARIBAUD
  1 sibling, 1 reply; 4+ messages in thread
From: Marek Vasut @ 2016-01-27  4:10 UTC (permalink / raw)
  To: u-boot

On Tuesday, January 26, 2016 at 05:40:49 PM, Albert ARIBAUD wrote:
> Some armv7 targets are missing a cache line size declaration.
> In preparation for "arm: cache: Implement cache range check for v7"
> patch, add these declarations with the appropriate value for
> the target's SoC or CPU.
> 
> Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>

[...]

> diff --git a/include/configs/at91-sama5_common.h
> b/include/configs/at91-sama5_common.h index 9db4a4f..7b06601 100644
> --- a/include/configs/at91-sama5_common.h
> +++ b/include/configs/at91-sama5_common.h
> @@ -12,6 +12,8 @@
> 
>  #include <asm/hardware.h>
> 
> +#define CONFIG_SYS_CACHELINE_SIZE	64
> +
>  #define CONFIG_SYS_TEXT_BASE		0x26f00000
> 
>  /* ARM asynchronous clock */

I think SAMA5 is CortexA5 and that has 32B cachelines.

Best regards,
Marek Vasut

^ permalink raw reply	[flat|nested] 4+ messages in thread

* [U-Boot] [PATCH] armv7: add cacheline sizes where missing
  2016-01-27  4:10 ` Marek Vasut
@ 2016-01-27  7:11   ` Albert ARIBAUD
  0 siblings, 0 replies; 4+ messages in thread
From: Albert ARIBAUD @ 2016-01-27  7:11 UTC (permalink / raw)
  To: u-boot

Hello Marek,

On Wed, 27 Jan 2016 05:10:59 +0100, Marek Vasut <marex@denx.de> wrote:
> On Tuesday, January 26, 2016 at 05:40:49 PM, Albert ARIBAUD wrote:
> > Some armv7 targets are missing a cache line size declaration.
> > In preparation for "arm: cache: Implement cache range check for v7"
> > patch, add these declarations with the appropriate value for
> > the target's SoC or CPU.
> > 
> > Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
> 
> [...]
> 
> > diff --git a/include/configs/at91-sama5_common.h
> > b/include/configs/at91-sama5_common.h index 9db4a4f..7b06601 100644
> > --- a/include/configs/at91-sama5_common.h
> > +++ b/include/configs/at91-sama5_common.h
> > @@ -12,6 +12,8 @@
> > 
> >  #include <asm/hardware.h>
> > 
> > +#define CONFIG_SYS_CACHELINE_SIZE	64
> > +
> >  #define CONFIG_SYS_TEXT_BASE		0x26f00000
> > 
> >  /* ARM asynchronous clock */
> 
> I think SAMA5 is CortexA5 and that has 32B cachelines.

Correct. V2 incoming.

> Best regards,
> Marek Vasut

Amicalement,
-- 
Albert.

^ permalink raw reply	[flat|nested] 4+ messages in thread

end of thread, other threads:[~2016-01-27  7:11 UTC | newest]

Thread overview: 4+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2016-01-26 16:40 [U-Boot] [PATCH] armv7: add cacheline sizes where missing Albert ARIBAUD
2016-01-27  2:29 ` Tom Rini
2016-01-27  4:10 ` Marek Vasut
2016-01-27  7:11   ` Albert ARIBAUD

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