[U-Boot] [PATCH 44/60] ARM: tegra: remove tegra_get_chip_sku()

Stephen Warren
2016-04-19T20:59:24Z

From: Stephen Warren <swarren@nvidia.com>

This is now only used by some Tegra20-specific code, and only to select
between T20/T25 code paths. Introduce a simpler function for that case,
and isolate it to the tegra20/ directory.

If we need SoC differentiation in the future, we should isolate the SKU-
specific logic to the SoC-specific directories, and provide a higher level
interface that the SoC-agnostic code can use; similar to pllx.h in the
previous commit.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
---
arch/arm/include/asm/arch-tegra/tegra.h | 38 ----------------------------
arch/arm/mach-tegra/ap.c | 40 -----------------------------
arch/arm/mach-tegra/cpu.h | 6 -----
arch/arm/mach-tegra/tegra20/Makefile | 1 +
arch/arm/mach-tegra/tegra20/emc.c | 15 ++++-------
arch/arm/mach-tegra/{ => tegra20}/fuse.h | 4 +--
arch/arm/mach-tegra/tegra20/pllx.c | 7 ++----
arch/arm/mach-tegra/tegra20/pmu.c | 16 ++++--------
arch/arm/mach-tegra/tegra20/sku.c | 43 ++++++++++++++++++++++++++++++++
arch/arm/mach-tegra/tegra20/sku.h | 12 +++++++++
arch/arm/mach-tegra/tegra20/warmboot.c | 2 +-
11 files changed, 71 insertions(+), 113 deletions(-)
rename arch/arm/mach-tegra/{ => tegra20}/fuse.h (91%)
create mode 100644 arch/arm/mach-tegra/tegra20/sku.c
create mode 100644 arch/arm/mach-tegra/tegra20/sku.h

diff --git a/arch/arm/include/asm/arch-tegra/tegra.h b/arch/arm/include/asm/arch-tegra/tegra.h
index 0de6aedf6b2a..71c9374c7ae0 100644
--- a/arch/arm/include/asm/arch-tegra/tegra.h
+++ b/arch/arm/include/asm/arch-tegra/tegra.h
@@ -36,7 +36,6 @@
#define PG_UP_TAG_0 0x0
#define PG_UP_TAG_AVP 0xAAAAAAAA

-#ifndef __ASSEMBLY__
/* Address at which WB code runs, it must not overlap Bootrom's IRAM usage */
#define NV_WB_RUN_ADDRESS 0x40020000

@@ -45,43 +44,6 @@
#define NVBOOTINFOTABLE_BCTSIZE 0x38 /* BCT size in BIT in IRAM */
#define NVBOOTINFOTABLE_BCTPTR 0x3C /* BCT pointer in BIT in IRAM */

-/* These are the available SKUs (product types) for Tegra */
-enum {
- SKU_ID_T20_7 = 0x7,
- SKU_ID_T20 = 0x8,
- SKU_ID_T25SE = 0x14,
- SKU_ID_AP25 = 0x17,
- SKU_ID_T25 = 0x18,
- SKU_ID_AP25E = 0x1b,
- SKU_ID_T25E = 0x1c,
- SKU_ID_T33 = 0x80,
- SKU_ID_T30 = 0x81, /* Cardhu value */
- SKU_ID_TM30MQS_P_A3 = 0xb1,
- SKU_ID_T114_ENG = 0x00, /* Dalmore value, unfused */
- SKU_ID_T114_1 = 0x01,
- SKU_ID_T124_ENG = 0x00, /* Venice2 value, unfused */
- SKU_ID_T210_ENG = 0x00, /* unfused value TBD */
-};
-
-/*
- * These are used to distinguish SOC types for setting up clocks. Mostly
- * we can tell the clocking required by looking at the SOC sku_id, but
- * for T30 it is a user option as to whether to run PLLP in fast or slow
- * mode, so we have two options there.
- */
-enum {
- TEGRA_SOC_T20,
- TEGRA_SOC_T25,
- TEGRA_SOC_T30,
- TEGRA_SOC_T114,
- TEGRA_SOC_T124,
- TEGRA_SOC_T210,
-
- TEGRA_SOC_CNT,
- TEGRA_SOC_UNKNOWN = -1,
-};
-#endif
-
#define PRM_RSTCTRL NV_PA_PMC_BASE

#endif /* TEGRA_H */
diff --git a/arch/arm/mach-tegra/ap.c b/arch/arm/mach-tegra/ap.c
index f354f7d87b14..3406e0efe4cb 100644
--- a/arch/arm/mach-tegra/ap.c
+++ b/arch/arm/mach-tegra/ap.c
@@ -14,49 +14,9 @@
#include <asm/arch-tegra/tegra.h>
#include <soc/mc.h>
#include "cpu.h"
-#include "fuse.h"
#include "pmc.h"
#include "scu.h"

-int tegra_get_chip_sku(void)
-{
-#ifdef CONFIG_TEGRA20
- struct fuse_regs *fuse = (struct fuse_regs *)NV_PA_FUSE_BASE;
- uint sku_id;
-
- sku_id = readl(&fuse->sku_info) & 0xff;
- debug("%s: SKU info byte is 0x%02X\n", __func__, sku_id);
-
- switch (sku_id) {
- case SKU_ID_T20_7:
- case SKU_ID_T20:
- return TEGRA_SOC_T20;
- case SKU_ID_T25SE:
- case SKU_ID_AP25:
- case SKU_ID_T25:
- case SKU_ID_AP25E:
- case SKU_ID_T25E:
- return TEGRA_SOC_T25;
- default:
- /* unknown chip/sku id */
- printf("ERROR: UNKNOWN SKU ID 0x%02X\n", sku_id);
- return TEGRA_SOC_UNKNOWN;
- }
-#endif
-#ifdef CONFIG_TEGRA30
- return TEGRA_SOC_T30;
-#endif
-#ifdef CONFIG_TEGRA114
- return TEGRA_SOC_T114;
-#endif
-#ifdef CONFIG_TEGRA124
- return TEGRA_SOC_T124;
-#endif
-#ifdef CONFIG_TEGRA210
- return TEGRA_SOC_T210;
-#endif
-}
-
#ifndef CONFIG_ARM64
static void enable_scu(void)
{
diff --git a/arch/arm/mach-tegra/cpu.h b/arch/arm/mach-tegra/cpu.h
index e17ccefb663b..4cb0b43b3723 100644
--- a/arch/arm/mach-tegra/cpu.h
+++ b/arch/arm/mach-tegra/cpu.h
@@ -56,12 +56,6 @@ void init_pllx(void);
void powerup_cpu(void);
void reset_A9_cpu(int reset);
void start_cpu(u32 reset_vector);
-/**
- * Works out the SOC/SKU type used for clocks settings
- *
- * @return SOC type - see TEGRA_SOC...
- */
-int tegra_get_chip_sku(void);
void adjust_pllp_out_freqs(void);
/* Set core and CPU voltages to nominal levels */
int pmu_set_nominal(void);
diff --git a/arch/arm/mach-tegra/tegra20/Makefile b/arch/arm/mach-tegra/tegra20/Makefile
index 0c2b5d51c73f..105f6ffa820c 100644
--- a/arch/arm/mach-tegra/tegra20/Makefile
+++ b/arch/arm/mach-tegra/tegra20/Makefile
@@ -14,6 +14,7 @@ CFLAGS_warmboot_avp.o += -march=armv4t

obj-y += clock.o funcmux.o pinmux.o
obj-y += pllx.o
+obj-y += sku.o
obj-$(CONFIG_TEGRA_LP0) += warmboot.o crypto.o warmboot_avp.o
obj-$(CONFIG_TEGRA20_CLOCK_SCALING) += emc.o
obj-$(CONFIG_TEGRA_PMU) += pmu.o
diff --git a/arch/arm/mach-tegra/tegra20/emc.c b/arch/arm/mach-tegra/tegra20/emc.c
index 242defde00a6..fa694d1fda84 100644
--- a/arch/arm/mach-tegra/tegra20/emc.c
+++ b/arch/arm/mach-tegra/tegra20/emc.c
@@ -11,9 +11,9 @@
#include <asm/arch/clock.h>
#include <asm/arch/tegra.h>
#include "../apb_misc.h"
-#include "../cpu.h"
#include "../emc.h"
#include "emc_priv.h"
+#include "sku.h"

DECLARE_GLOBAL_DATA_PTR;

@@ -290,14 +290,9 @@ int board_emc_init(void)
{
unsigned rate;

- switch (tegra_get_chip_sku()) {
- default:
- case TEGRA_SOC_T20:
- rate = EMC_SDRAM_RATE_T20;
- break;
- case TEGRA_SOC_T25:
- rate = EMC_SDRAM_RATE_T25;
- break;
- }
+ if (soc_is_tegra25())
+ rate = EMC_SDRAM_RATE_T25;
+ else
+ rate = EMC_SDRAM_RATE_T20;
return tegra_set_emc(gd->fdt_blob, rate);
}
diff --git a/arch/arm/mach-tegra/fuse.h b/arch/arm/mach-tegra/tegra20/fuse.h
similarity index 91%
rename from arch/arm/mach-tegra/fuse.h
rename to arch/arm/mach-tegra/tegra20/fuse.h
index 448cf0869cde..f0bbfa275bf8 100644
--- a/arch/arm/mach-tegra/fuse.h
+++ b/arch/arm/mach-tegra/tegra20/fuse.h
@@ -5,8 +5,8 @@
* SPDX-License-Identifier: GPL-2.0+
*/

-#ifndef _TEGRA_FUSE_H
-#define _TEGRA_FUSE_H
+#ifndef _TEGRA20_FUSE_H
+#define _TEGRA20_FUSE_H

/* FUSE registers */
struct fuse_regs {
diff --git a/arch/arm/mach-tegra/tegra20/pllx.c b/arch/arm/mach-tegra/tegra20/pllx.c
index f094f06d7fed..1e0127313c4f 100644
--- a/arch/arm/mach-tegra/tegra20/pllx.c
+++ b/arch/arm/mach-tegra/tegra20/pllx.c
@@ -6,8 +6,8 @@

#include <common.h>
#include <asm/arch-tegra/clock.h>
-#include "../cpu.h"
#include "../pllx.h"
+#include "sku.h"

static const struct clk_pll_table tegra20_pll_x_table[CLOCK_OSC_FREQ_COUNT] = {
/*
@@ -49,10 +49,7 @@ static const struct clk_pll_table tegra25_pll_x_table[CLOCK_OSC_FREQ_COUNT] = {

const struct clk_pll_table *tegra_get_pllx_table(void)
{
- int chip_sku;
-
- chip_sku = tegra_get_chip_sku();
- if (chip_sku == TEGRA_SOC_T25)
+ if (soc_is_tegra25())
return tegra25_pll_x_table;
else
return tegra20_pll_x_table;
diff --git a/arch/arm/mach-tegra/tegra20/pmu.c b/arch/arm/mach-tegra/tegra20/pmu.c
index 2ebcfaf2695e..ac24c6b3ac1d 100644
--- a/arch/arm/mach-tegra/tegra20/pmu.c
+++ b/arch/arm/mach-tegra/tegra20/pmu.c
@@ -11,7 +11,7 @@
#include <asm/io.h>
#include <asm/arch/tegra.h>
#include <mach/tegra_i2c.h>
-#include "../cpu.h"
+#include "sku.h"

#define VDD_CORE_NOMINAL_T25 0x17 /* 1.3v */
#define VDD_CPU_NOMINAL_T25 0x10 /* 1.125v */
@@ -32,18 +32,12 @@ int pmu_set_nominal(void)
int ret;

/* by default, the table has been filled with T25 settings */
- switch (tegra_get_chip_sku()) {
- case TEGRA_SOC_T20:
- core = VDD_CORE_NOMINAL_T20;
- cpu = VDD_CPU_NOMINAL_T20;
- break;
- case TEGRA_SOC_T25:
+ if (soc_is_tegra25()) {
core = VDD_CORE_NOMINAL_T25;
cpu = VDD_CPU_NOMINAL_T25;
- break;
- default:
- debug("%s: Unknown SKU id\n", __func__);
- return -1;
+ } else {
+ core = VDD_CORE_NOMINAL_T20;
+ cpu = VDD_CPU_NOMINAL_T20;
}

ret = tegra_i2c_get_dvc_bus(&bus);
diff --git a/arch/arm/mach-tegra/tegra20/sku.c b/arch/arm/mach-tegra/tegra20/sku.c
new file mode 100644
index 000000000000..56c9e97e2454
--- /dev/null
+++ b/arch/arm/mach-tegra/tegra20/sku.c
@@ -0,0 +1,43 @@
+/*
+ * Copyright (c) 2010-2016, NVIDIA CORPORATION. All rights reserved.
+ *
+ * SPDX-License-Identifier: GPL-2.0
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include "fuse.h"
+
+/* These are the available SKUs (product types) for Tegra20 */
+#define SKU_ID_T20_7 0x7
+#define SKU_ID_T20 0x8
+#define SKU_ID_T25SE 0x14
+#define SKU_ID_AP25 0x17
+#define SKU_ID_T25 0x18
+#define SKU_ID_AP25E 0x1b
+#define SKU_ID_T25E 0x1c
+
+bool soc_is_tegra25(void)
+{
+ struct fuse_regs *fuse = (struct fuse_regs *)NV_PA_FUSE_BASE;
+ uint sku_id;
+
+ sku_id = readl(&fuse->sku_info) & 0xff;
+ debug("%s: SKU info byte is 0x%02X\n", __func__, sku_id);
+
+ switch (sku_id) {
+ case SKU_ID_T20_7:
+ case SKU_ID_T20:
+ return false;
+ case SKU_ID_T25SE:
+ case SKU_ID_AP25:
+ case SKU_ID_T25:
+ case SKU_ID_AP25E:
+ case SKU_ID_T25E:
+ return true;
+ default:
+ /* unknown chip/sku id */
+ printf("ERROR: UNKNOWN SKU ID 0x%02X\n", sku_id);
+ return false;
+ }
+}
diff --git a/arch/arm/mach-tegra/tegra20/sku.h b/arch/arm/mach-tegra/tegra20/sku.h
new file mode 100644
index 000000000000..33a2ec863958
--- /dev/null
+++ b/arch/arm/mach-tegra/tegra20/sku.h
@@ -0,0 +1,12 @@
+/*
+ * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved.
+ *
+ * SPDX-License-Identifier: GPL-2.0
+ */
+
+#ifndef _TEGRA20_SKU_H
+#define _TEGRA20_SKU_H
+
+bool soc_is_tegra25(void);
+
+#endif
diff --git a/arch/arm/mach-tegra/tegra20/warmboot.c b/arch/arm/mach-tegra/tegra20/warmboot.c
index d5f7e96eb07e..dc9727ab3f5f 100644
--- a/arch/arm/mach-tegra/tegra20/warmboot.c
+++ b/arch/arm/mach-tegra/tegra20/warmboot.c
@@ -14,10 +14,10 @@
#include <asm/arch-tegra/clk_rst.h>
#include "../apb_misc.h"
#include "../emc.h"
-#include "../fuse.h"
#include "../pmc.h"
#include "crypto.h"
#include "emc_priv.h"
+#include "fuse.h"
#include "gp_padctrl.h"
#include "sdram_param.h"
#include "warmboot.h"
--
2.8.1