From mboxrd@z Thu Jan 1 00:00:00 1970 From: Pavel Machek Date: Wed, 4 May 2016 21:04:52 +0200 Subject: [U-Boot] [PATCH V2 1/2] mtd: cqspi: Simplify indirect write code In-Reply-To: <1462296357-5921-1-git-send-email-marex@denx.de> References: <1462296357-5921-1-git-send-email-marex@denx.de> Message-ID: <20160504190452.GB9986@amd> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Hi! > The indirect write code is buggy pile of nastiness which fails horribly > when the system runs fast enough to saturate the controller. The failure > results in some pages (256B) not being written to the flash. This can be > observed on systems which run with Dcache enabled and L2 cache enabled, > like the Altera SoCFPGA. > > This patch replaces the whole unmaintainable indirect write implementation > with the one from upcoming Linux CQSPI driver, which went through multiple > rounds of thorough review and testing. While this makes the patch look > terrifying and violates all best-practices of software development, all > the patch does is it plucks out duplicate ad-hoc code distributed across > the driver and replaces it with more compact code doing exactly the same > thing. Ok, sorry, I still don't understand the changelog. First, it describes the bug with L2 cache enabled, but then it says that "all the patch does .. doing exactly the same thing". So I assume it does not do the same thing, but replaces duplicated code in u-boot with working code from Linux? Thanks for doing this, Pavel -- (english) http://www.livejournal.com/~pavelmachek (cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html