public inbox for u-boot@lists.denx.de
 help / color / mirror / Atom feed
From: tnishinaga.dev at gmail.com <tnishinaga.dev@gmail.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH 3/3] stm32: Change USART port to USART6 for stm32f746 discovery board
Date: Fri,  8 Jul 2016 01:02:26 +0900	[thread overview]
Message-ID: <20160707160226.4145-4-tnishinaga.dev@gmail.com> (raw)
In-Reply-To: <20160707160226.4145-1-tnishinaga.dev@gmail.com>

From: Toshifumi NISHINAGA <tnishinaga.dev@gmail.com>

This change is to remove a halt at about 200KiB
while sending a large(1MiB) binary to a micro controller using USART1.
USART1 is connected to a PC via an on-board ST-Link debugger
that also functions as a USB-Serial converter.
However, it seems to loss some data occasionally.
So I changed the serial port to USART6 and connected it to the PC using
an FTDI USB-Serial cable, therefore the transmission was successfully
completed.

Signed-off-by: Toshifumi NISHINAGA <tnishinaga.dev@gmail.com>
---
 arch/arm/include/asm/arch-stm32f7/stm32_periph.h |  2 ++
 arch/arm/mach-stm32/stm32f7/clock.c              |  3 +++
 board/st/stm32f746-disco/stm32f746-disco.c       | 13 ++++++-------
 3 files changed, 11 insertions(+), 7 deletions(-)

diff --git a/arch/arm/include/asm/arch-stm32f7/stm32_periph.h b/arch/arm/include/asm/arch-stm32f7/stm32_periph.h
index 38adc4e..0bd4695 100644
--- a/arch/arm/include/asm/arch-stm32f7/stm32_periph.h
+++ b/arch/arm/include/asm/arch-stm32f7/stm32_periph.h
@@ -17,11 +17,13 @@
 enum periph_id {
 	UART1_GPIOA_9_10 = 0,
 	UART2_GPIOD_5_6,
+	UART6_GPIOC_6_7,
 };
 
 enum periph_clock {
 	USART1_CLOCK_CFG = 0,
 	USART2_CLOCK_CFG,
+	USART6_CLOCK_CFG,
 	GPIO_A_CLOCK_CFG,
 	GPIO_B_CLOCK_CFG,
 	GPIO_C_CLOCK_CFG,
diff --git a/arch/arm/mach-stm32/stm32f7/clock.c b/arch/arm/mach-stm32/stm32f7/clock.c
index 78d22d4..ac47850 100644
--- a/arch/arm/mach-stm32/stm32f7/clock.c
+++ b/arch/arm/mach-stm32/stm32f7/clock.c
@@ -245,6 +245,9 @@ void clock_setup(int peripheral)
 	case USART1_CLOCK_CFG:
 		setbits_le32(RCC_BASE + RCC_APB2ENR, RCC_ENR_USART1EN);
 		break;
+	case USART6_CLOCK_CFG:
+		setbits_le32(RCC_BASE + RCC_APB2ENR, RCC_ENR_USART6EN);
+		break;
 	case GPIO_A_CLOCK_CFG:
 		setbits_le32(RCC_BASE + RCC_AHB1ENR, RCC_ENR_GPIO_A_EN);
 		break;
diff --git a/board/st/stm32f746-disco/stm32f746-disco.c b/board/st/stm32f746-disco/stm32f746-disco.c
index 404fdfa..47aa058 100644
--- a/board/st/stm32f746-disco/stm32f746-disco.c
+++ b/board/st/stm32f746-disco/stm32f746-disco.c
@@ -32,7 +32,7 @@ const struct stm32_gpio_ctl gpio_ctl_usart = {
 	.otype = STM32_GPIO_OTYPE_PP,
 	.speed = STM32_GPIO_SPEED_50M,
 	.pupd = STM32_GPIO_PUPD_UP,
-	.af = STM32_GPIO_AF7
+	.af = STM32_GPIO_AF8
 };
 
 const struct stm32_gpio_ctl gpio_ctl_fmc = {
@@ -251,8 +251,8 @@ int dram_init(void)
 }
 
 static const struct stm32_gpio_dsc usart_gpio[] = {
-	{STM32_GPIO_PORT_A, STM32_GPIO_PIN_9},	/* TX */
-	{STM32_GPIO_PORT_B, STM32_GPIO_PIN_7},	/* RX */
+	{STM32_GPIO_PORT_C, STM32_GPIO_PIN_6},	/* TX */
+	{STM32_GPIO_PORT_C, STM32_GPIO_PIN_7},	/* RX */
 };
 
 int uart_setup_gpio(void)
@@ -260,8 +260,7 @@ int uart_setup_gpio(void)
 	int i;
 	int rv = 0;
 
-	clock_setup(GPIO_A_CLOCK_CFG);
-	clock_setup(GPIO_B_CLOCK_CFG);
+	clock_setup(GPIO_C_CLOCK_CFG);
 	for (i = 0; i < ARRAY_SIZE(usart_gpio); i++) {
 		rv = stm32_gpio_config(&usart_gpio[i], &gpio_ctl_usart);
 		if (rv)
@@ -273,7 +272,7 @@ out:
 }
 
 static const struct stm32x7_serial_platdata serial_platdata = {
-	.base = (struct stm32_usart *)USART1_BASE,
+	.base = (struct stm32_usart *)USART6_BASE,
 	.clock = CONFIG_SYS_CLK_FREQ,
 };
 
@@ -292,7 +291,7 @@ int board_early_init_f(void)
 	int res;
 
 	res = uart_setup_gpio();
-	clock_setup(USART1_CLOCK_CFG);
+	clock_setup(USART6_CLOCK_CFG);
 	if (res)
 		return res;
 
-- 
2.9.0

  parent reply	other threads:[~2016-07-07 16:02 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-07-07 16:02 [U-Boot] [PATCH 0/3] stm32: Add SDRAM support for stm32f746 discovery board tnishinaga.dev at gmail.com
2016-07-07 16:02 ` [U-Boot] [PATCH 1/3] stm32: clk: Add 200MHz clock configuration " tnishinaga.dev at gmail.com
2016-07-16 13:51   ` [U-Boot] [U-Boot, " Tom Rini
2016-07-07 16:02 ` [U-Boot] [PATCH 2/3] stm32: Add SDRAM support " tnishinaga.dev at gmail.com
2016-07-16 13:51   ` [U-Boot] [U-Boot, " Tom Rini
2016-07-07 16:02 ` tnishinaga.dev at gmail.com [this message]
2016-07-16 13:51   ` [U-Boot] [U-Boot, 3/3] stm32: Change USART port to USART6 " Tom Rini
2016-07-20 21:59     ` Vikas MANOCHA
2016-07-21 19:39       ` Tom Rini
2016-07-22  1:12         ` Vikas MANOCHA
2016-07-29 13:23       ` NISHINAGA Toshifumi

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20160707160226.4145-4-tnishinaga.dev@gmail.com \
    --to=tnishinaga.dev@gmail.com \
    --cc=u-boot@lists.denx.de \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox