* [U-Boot] [PATCH] Revert "Revert "rockchip: rk3288: correct sdram setting""
@ 2016-07-15 15:24 John Keeping
2016-07-15 16:16 ` Tom Rini
2016-07-15 16:33 ` [U-Boot] [PATCH v2] rockchip: sdram: Fix register layout for Linux John Keeping
0 siblings, 2 replies; 6+ messages in thread
From: John Keeping @ 2016-07-15 15:24 UTC (permalink / raw)
To: u-boot
The original commit was correct, except fot the priority of the mask
when extracting "bw" to calculate the SDRAM size. Add the necessary
parentheses so that we can apply the original fix.
This reverts commit b525556e6325aa71427c0519f36247981cd444df.
Signed-off-by: John Keeping <john@metanate.com>
---
arch/arm/mach-rockchip/rk3288/sdram_rk3288.c | 14 +++++++-------
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/arch/arm/mach-rockchip/rk3288/sdram_rk3288.c b/arch/arm/mach-rockchip/rk3288/sdram_rk3288.c
index b36b6af..ef8b712 100644
--- a/arch/arm/mach-rockchip/rk3288/sdram_rk3288.c
+++ b/arch/arm/mach-rockchip/rk3288/sdram_rk3288.c
@@ -575,14 +575,14 @@ static void dram_all_config(const struct dram_info *dram,
&sdram_params->ch[chan];
sys_reg |= info->row_3_4 << SYS_REG_ROW_3_4_SHIFT(chan);
- sys_reg |= chan << SYS_REG_CHINFO_SHIFT(chan);
+ sys_reg |= 1 << SYS_REG_CHINFO_SHIFT(chan);
sys_reg |= (info->rank - 1) << SYS_REG_RANK_SHIFT(chan);
sys_reg |= (info->col - 9) << SYS_REG_COL_SHIFT(chan);
- sys_reg |= info->bk == 3 ? 1 << SYS_REG_BK_SHIFT(chan) : 0;
+ sys_reg |= info->bk == 3 ? 0 : 1 << SYS_REG_BK_SHIFT(chan);
sys_reg |= (info->cs0_row - 13) << SYS_REG_CS0_ROW_SHIFT(chan);
sys_reg |= (info->cs1_row - 13) << SYS_REG_CS1_ROW_SHIFT(chan);
- sys_reg |= info->bw << SYS_REG_BW_SHIFT(chan);
- sys_reg |= info->dbw << SYS_REG_DBW_SHIFT(chan);
+ sys_reg |= (2 >> info->bw) << SYS_REG_BW_SHIFT(chan);
+ sys_reg |= (2 >> info->dbw) << SYS_REG_DBW_SHIFT(chan);
dram_cfg_rbc(&dram->chan[chan], chan, sdram_params);
}
@@ -734,13 +734,13 @@ size_t sdram_size_mb(struct rk3288_pmu *pmu)
rank = 1 + (sys_reg >> SYS_REG_RANK_SHIFT(ch) &
SYS_REG_RANK_MASK);
col = 9 + (sys_reg >> SYS_REG_COL_SHIFT(ch) & SYS_REG_COL_MASK);
- bk = sys_reg & (1 << SYS_REG_BK_SHIFT(ch)) ? 3 : 0;
+ bk = 3 - ((sys_reg >> SYS_REG_BK_SHIFT(ch)) & SYS_REG_BK_MASK);
cs0_row = 13 + (sys_reg >> SYS_REG_CS0_ROW_SHIFT(ch) &
SYS_REG_CS0_ROW_MASK);
cs1_row = 13 + (sys_reg >> SYS_REG_CS1_ROW_SHIFT(ch) &
SYS_REG_CS1_ROW_MASK);
- bw = (sys_reg >> SYS_REG_BW_SHIFT(ch)) &
- SYS_REG_BW_MASK;
+ bw = (2 >> ((sys_reg >> SYS_REG_BW_SHIFT(ch)) &
+ SYS_REG_BW_MASK));
row_3_4 = sys_reg >> SYS_REG_ROW_3_4_SHIFT(ch) &
SYS_REG_ROW_3_4_MASK;
--
2.9.0.465.g8850cbc.dirty
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [U-Boot] [PATCH] Revert "Revert "rockchip: rk3288: correct sdram setting""
2016-07-15 15:24 [U-Boot] [PATCH] Revert "Revert "rockchip: rk3288: correct sdram setting"" John Keeping
@ 2016-07-15 16:16 ` Tom Rini
2016-07-15 16:33 ` [U-Boot] [PATCH v2] rockchip: sdram: Fix register layout for Linux John Keeping
1 sibling, 0 replies; 6+ messages in thread
From: Tom Rini @ 2016-07-15 16:16 UTC (permalink / raw)
To: u-boot
On Fri, Jul 15, 2016 at 04:24:57PM +0100, John Keeping wrote:
> The original commit was correct, except fot the priority of the mask
> when extracting "bw" to calculate the SDRAM size. Add the necessary
> parentheses so that we can apply the original fix.
>
> This reverts commit b525556e6325aa71427c0519f36247981cd444df.
>
> Signed-off-by: John Keeping <john@metanate.com>
I don't like to revert a revert, it starts to get confusing to follow
the history. It sounds like this isn't an exact revert either, it's
reverting and then fixing the original commit. Please re-word the
message so that it's clear that we're re-implementing what b525556
reverted but fixing ... Thanks!
--
Tom
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^ permalink raw reply [flat|nested] 6+ messages in thread
* [U-Boot] [PATCH v2] rockchip: sdram: Fix register layout for Linux
2016-07-15 15:24 [U-Boot] [PATCH] Revert "Revert "rockchip: rk3288: correct sdram setting"" John Keeping
2016-07-15 16:16 ` Tom Rini
@ 2016-07-15 16:33 ` John Keeping
2016-07-15 17:14 ` Tom Rini
2016-07-17 14:13 ` Simon Glass
1 sibling, 2 replies; 6+ messages in thread
From: John Keeping @ 2016-07-15 16:33 UTC (permalink / raw)
To: u-boot
The ChromeOS kernel reads the RAM settings from PMU_SYS_REG2 and expects
the bootloader to store the necessary information there. We're using
the same register to pass the same information between the SPL and
U-Boot but in a slightly different format.
Change this to use the format expected by the Linux DMC driver so that
the system doesn't hang in Linux by misconfiguring the RAM.
This is almost the same as commit b5788dc ("rockchip: rk3288: correct
sdram setting") which was reverted in commit b525556 ("Revert "rockchip:
rk3288: correct sdram setting"") but parenthese have been added to apply
the mask correctly when reading the "bw" setting and a couple of minor
style issues have been fixed to keep check_patch.pl happy.
Signed-off-by: John Keeping <john@metanate.com>
---
Changes in v2:
- Reword the commit message to not be "Revert: Revert: ..."
arch/arm/mach-rockchip/rk3288/sdram_rk3288.c | 14 +++++++-------
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/arch/arm/mach-rockchip/rk3288/sdram_rk3288.c b/arch/arm/mach-rockchip/rk3288/sdram_rk3288.c
index b36b6af..ef8b712 100644
--- a/arch/arm/mach-rockchip/rk3288/sdram_rk3288.c
+++ b/arch/arm/mach-rockchip/rk3288/sdram_rk3288.c
@@ -575,14 +575,14 @@ static void dram_all_config(const struct dram_info *dram,
&sdram_params->ch[chan];
sys_reg |= info->row_3_4 << SYS_REG_ROW_3_4_SHIFT(chan);
- sys_reg |= chan << SYS_REG_CHINFO_SHIFT(chan);
+ sys_reg |= 1 << SYS_REG_CHINFO_SHIFT(chan);
sys_reg |= (info->rank - 1) << SYS_REG_RANK_SHIFT(chan);
sys_reg |= (info->col - 9) << SYS_REG_COL_SHIFT(chan);
- sys_reg |= info->bk == 3 ? 1 << SYS_REG_BK_SHIFT(chan) : 0;
+ sys_reg |= info->bk == 3 ? 0 : 1 << SYS_REG_BK_SHIFT(chan);
sys_reg |= (info->cs0_row - 13) << SYS_REG_CS0_ROW_SHIFT(chan);
sys_reg |= (info->cs1_row - 13) << SYS_REG_CS1_ROW_SHIFT(chan);
- sys_reg |= info->bw << SYS_REG_BW_SHIFT(chan);
- sys_reg |= info->dbw << SYS_REG_DBW_SHIFT(chan);
+ sys_reg |= (2 >> info->bw) << SYS_REG_BW_SHIFT(chan);
+ sys_reg |= (2 >> info->dbw) << SYS_REG_DBW_SHIFT(chan);
dram_cfg_rbc(&dram->chan[chan], chan, sdram_params);
}
@@ -734,13 +734,13 @@ size_t sdram_size_mb(struct rk3288_pmu *pmu)
rank = 1 + (sys_reg >> SYS_REG_RANK_SHIFT(ch) &
SYS_REG_RANK_MASK);
col = 9 + (sys_reg >> SYS_REG_COL_SHIFT(ch) & SYS_REG_COL_MASK);
- bk = sys_reg & (1 << SYS_REG_BK_SHIFT(ch)) ? 3 : 0;
+ bk = 3 - ((sys_reg >> SYS_REG_BK_SHIFT(ch)) & SYS_REG_BK_MASK);
cs0_row = 13 + (sys_reg >> SYS_REG_CS0_ROW_SHIFT(ch) &
SYS_REG_CS0_ROW_MASK);
cs1_row = 13 + (sys_reg >> SYS_REG_CS1_ROW_SHIFT(ch) &
SYS_REG_CS1_ROW_MASK);
- bw = (sys_reg >> SYS_REG_BW_SHIFT(ch)) &
- SYS_REG_BW_MASK;
+ bw = (2 >> ((sys_reg >> SYS_REG_BW_SHIFT(ch)) &
+ SYS_REG_BW_MASK));
row_3_4 = sys_reg >> SYS_REG_ROW_3_4_SHIFT(ch) &
SYS_REG_ROW_3_4_MASK;
--
2.9.0.465.g8850cbc.dirty
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [U-Boot] [PATCH v2] rockchip: sdram: Fix register layout for Linux
2016-07-15 16:33 ` [U-Boot] [PATCH v2] rockchip: sdram: Fix register layout for Linux John Keeping
@ 2016-07-15 17:14 ` Tom Rini
2016-07-17 14:13 ` Simon Glass
1 sibling, 0 replies; 6+ messages in thread
From: Tom Rini @ 2016-07-15 17:14 UTC (permalink / raw)
To: u-boot
On Fri, Jul 15, 2016 at 05:33:23PM +0100, John Keeping wrote:
> The ChromeOS kernel reads the RAM settings from PMU_SYS_REG2 and expects
> the bootloader to store the necessary information there. We're using
> the same register to pass the same information between the SPL and
> U-Boot but in a slightly different format.
>
> Change this to use the format expected by the Linux DMC driver so that
> the system doesn't hang in Linux by misconfiguring the RAM.
>
> This is almost the same as commit b5788dc ("rockchip: rk3288: correct
> sdram setting") which was reverted in commit b525556 ("Revert "rockchip:
> rk3288: correct sdram setting"") but parenthese have been added to apply
> the mask correctly when reading the "bw" setting and a couple of minor
> style issues have been fixed to keep check_patch.pl happy.
>
> Signed-off-by: John Keeping <john@metanate.com>
>
Thanks!
Reviewed-by: Tom Rini <trini@konsulko.com>
--
Tom
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^ permalink raw reply [flat|nested] 6+ messages in thread
* [U-Boot] [PATCH v2] rockchip: sdram: Fix register layout for Linux
2016-07-15 16:33 ` [U-Boot] [PATCH v2] rockchip: sdram: Fix register layout for Linux John Keeping
2016-07-15 17:14 ` Tom Rini
@ 2016-07-17 14:13 ` Simon Glass
2016-07-18 12:20 ` Simon Glass
1 sibling, 1 reply; 6+ messages in thread
From: Simon Glass @ 2016-07-17 14:13 UTC (permalink / raw)
To: u-boot
On 15 July 2016 at 10:33, John Keeping <john@metanate.com> wrote:
> The ChromeOS kernel reads the RAM settings from PMU_SYS_REG2 and expects
> the bootloader to store the necessary information there. We're using
> the same register to pass the same information between the SPL and
> U-Boot but in a slightly different format.
>
> Change this to use the format expected by the Linux DMC driver so that
> the system doesn't hang in Linux by misconfiguring the RAM.
>
> This is almost the same as commit b5788dc ("rockchip: rk3288: correct
> sdram setting") which was reverted in commit b525556 ("Revert "rockchip:
> rk3288: correct sdram setting"") but parenthese have been added to apply
> the mask correctly when reading the "bw" setting and a couple of minor
> style issues have been fixed to keep check_patch.pl happy.
>
> Signed-off-by: John Keeping <john@metanate.com>
>
> ---
>
> Changes in v2:
> - Reword the commit message to not be "Revert: Revert: ..."
>
> arch/arm/mach-rockchip/rk3288/sdram_rk3288.c | 14 +++++++-------
> 1 file changed, 7 insertions(+), 7 deletions(-)
Acked-by: Simon Glass <sjg@chromium.org>
^ permalink raw reply [flat|nested] 6+ messages in thread
* [U-Boot] [PATCH v2] rockchip: sdram: Fix register layout for Linux
2016-07-17 14:13 ` Simon Glass
@ 2016-07-18 12:20 ` Simon Glass
0 siblings, 0 replies; 6+ messages in thread
From: Simon Glass @ 2016-07-18 12:20 UTC (permalink / raw)
To: u-boot
On 17 July 2016 at 08:13, Simon Glass <sjg@chromium.org> wrote:
> On 15 July 2016 at 10:33, John Keeping <john@metanate.com> wrote:
>> The ChromeOS kernel reads the RAM settings from PMU_SYS_REG2 and expects
>> the bootloader to store the necessary information there. We're using
>> the same register to pass the same information between the SPL and
>> U-Boot but in a slightly different format.
>>
>> Change this to use the format expected by the Linux DMC driver so that
>> the system doesn't hang in Linux by misconfiguring the RAM.
>>
>> This is almost the same as commit b5788dc ("rockchip: rk3288: correct
>> sdram setting") which was reverted in commit b525556 ("Revert "rockchip:
>> rk3288: correct sdram setting"") but parenthese have been added to apply
>> the mask correctly when reading the "bw" setting and a couple of minor
>> style issues have been fixed to keep check_patch.pl happy.
>>
>> Signed-off-by: John Keeping <john@metanate.com>
>>
>> ---
>>
>> Changes in v2:
>> - Reword the commit message to not be "Revert: Revert: ..."
>>
>> arch/arm/mach-rockchip/rk3288/sdram_rk3288.c | 14 +++++++-------
>> 1 file changed, 7 insertions(+), 7 deletions(-)
>
> Acked-by: Simon Glass <sjg@chromium.org>
Applied to u-boot-rockchip, thanks!
^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2016-07-18 12:20 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz follow: Atom feed
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2016-07-15 15:24 [U-Boot] [PATCH] Revert "Revert "rockchip: rk3288: correct sdram setting"" John Keeping
2016-07-15 16:16 ` Tom Rini
2016-07-15 16:33 ` [U-Boot] [PATCH v2] rockchip: sdram: Fix register layout for Linux John Keeping
2016-07-15 17:14 ` Tom Rini
2016-07-17 14:13 ` Simon Glass
2016-07-18 12:20 ` Simon Glass
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