From mboxrd@z Thu Jan 1 00:00:00 1970 From: Tom Rini Date: Mon, 25 Jul 2016 22:32:28 -0400 Subject: [U-Boot] [U-Boot, 2/2] ARM: am33xx: Always inhibit init/refresh during DDR phy init In-Reply-To: <1469100512-5467-3-git-send-email-Russ.Dill@ti.com> References: <1469100512-5467-3-git-send-email-Russ.Dill@ti.com> Message-ID: <20160726023228.GG14698@bill-the-cat> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On Thu, Jul 21, 2016 at 04:28:32AM -0700, Russ Dill wrote: > A couple of commits have modified the am33xx/am437x ddr2/ddr3 > initialization path to fix certain issues, but have had the side effect > of causing L3 noc errors during initialization. The two commits are: > > 69b918 "am33xx,ddr3: fix ddr3 sdram configuration" > fc46ba "arm: am437x: Enable hardware leveling for EMIF" > > The EMIF_REG_INITREF_DIS_MASK bit still needs to be set for all > platforms. This delays initialization and refresh until a later stage. > The 500us timer can be programmed for platforms that require it > and for platforms that don't require it. It is currently hardcoded > for 400MHz systems. For systems with a higher memory frequency > this needs to be a larger value, and for systems with a lower > memory frequency this can be a lower value. This can be > considered a separate issue and corrected in a later commit. > > Signed-off-by: Russ Dill > Reviewed-by: Tom Rini Applied to u-boot/master, thanks! -- Tom -------------- next part -------------- A non-text attachment was scrubbed... Name: signature.asc Type: application/pgp-signature Size: 819 bytes Desc: Digital signature URL: