From mboxrd@z Thu Jan 1 00:00:00 1970 From: Fabien Parent Date: Tue, 22 Nov 2016 18:13:30 +0100 Subject: [U-Boot] [PATCH v2 1/4] davinci: omapl138_lcdk: configure pll0 In-Reply-To: <20161122171333.30192-1-fparent@baylibre.com> References: <20161122171333.30192-1-fparent@baylibre.com> Message-ID: <20161122171333.30192-2-fparent@baylibre.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de The SPL is not able to boot properly because the PLL0 is not configured. Configure it. Signed-off-by: Fabien Parent --- V1 -> V2 * New patch --- include/configs/omapl138_lcdk.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/configs/omapl138_lcdk.h b/include/configs/omapl138_lcdk.h index 854fc47..ce3a8f4 100644 --- a/include/configs/omapl138_lcdk.h +++ b/include/configs/omapl138_lcdk.h @@ -30,6 +30,7 @@ #define CONFIG_SYS_TIMERBASE DAVINCI_TIMER0_BASE #define CONFIG_SYS_HZ_CLOCK clk_get(DAVINCI_AUXCLK_CLKID) #define CONFIG_SYS_HZ 1000 +#define CONFIG_SYS_DA850_PLL_INIT #define CONFIG_SKIP_LOWLEVEL_INIT #define CONFIG_SYS_TEXT_BASE 0xc1080000 -- 2.10.2