[U-Boot] [PATCH v2] arm: am33xx: Initialize EMIF REG_PR_OLD_COUNT for BBB and am335x-evm

[Tom Rini <trini@konsulko.com>]

On Thu, Dec 08, 2016 at 12:19:01PM +0200, Jyri Sarha wrote:

> Initialize EMIF OCP_CONFIG registers REG_COS_COUNT_1, REG_COS_COUNT_2,
> and REG_PR_OLD_COUNT field for Beaglebone-Black and am335x-evm. With
> the default values LCDC suffers from DMA FIFO underflows and frame
> synchronization lost errors. The initialization values are the highest
> that work flawlessly when heavy memory load is generated by CPU. 32bpp
> colors were used in the test. On BBB the video mode used 110MHz pixel
> clock. The mode supported by the panel of am335x-evm uses 30MHz pixel
> clock.
> 
> Signed-off-by: Jyri Sarha <jsarha@ti.com>

Reviewed-by: Tom Rini <trini@konsulko.com>

But, does TI have a whitepaper or tech pub or anything that describes
how one would calculate that value on a custom design?  Tweaking that
for optimal usage is something I know happens in some cases and could be
used in a lot more.  If there's a doc that explains how to figure it
out, it would be good to link to it in the comments in the patch as
well.  Since I don't know that such a thing does exist I'll reviewed-by
it now tho.  Thanks!

-- 
Tom
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