From mboxrd@z Thu Jan 1 00:00:00 1970 From: Maxime Ripard Date: Mon, 19 Dec 2016 11:01:00 +0100 Subject: [U-Boot] [PATCH v3 19/26] sunxi: H3/A64: fix non-ODT setting In-Reply-To: <1482112216-12983-20-git-send-email-andre.przywara@arm.com> References: <1482112216-12983-1-git-send-email-andre.przywara@arm.com> <1482112216-12983-20-git-send-email-andre.przywara@arm.com> Message-ID: <20161219100100.wjf26hangao3vcat@lukather> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On Mon, Dec 19, 2016 at 01:50:09AM +0000, Andre Przywara wrote: > According to Jens disabling the on-die-termination should set bit 5, > not bit 1 in the respective register. Fix this. > > Reported-by: Jens Kuske > Signed-off-by: Andre Przywara > --- > arch/arm/mach-sunxi/dram_sun8i_h3.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/arch/arm/mach-sunxi/dram_sun8i_h3.c b/arch/arm/mach-sunxi/dram_sun8i_h3.c > index 6ee73ae..1bdd738 100644 > --- a/arch/arm/mach-sunxi/dram_sun8i_h3.c > +++ b/arch/arm/mach-sunxi/dram_sun8i_h3.c > @@ -438,7 +438,7 @@ static int mctl_channel_init(uint16_t socid, struct dram_para *para) > clrsetbits_le32(&mctl_ctl->dx[i].gcr, (0x3 << 4) | > (0x1 << 1) | (0x3 << 2) | (0x3 << 12) | > (0x3 << 14), > - IS_ENABLED(CONFIG_DRAM_ODT_EN) ? 0x0 : 0x2); > + IS_ENABLED(CONFIG_DRAM_ODT_EN) ? 0x0 : 0x20); You should use a define here if that bit function is known. Maxime -- Maxime Ripard, Free Electrons Embedded Linux and Kernel engineering http://free-electrons.com -------------- next part -------------- A non-text attachment was scrubbed... Name: signature.asc Type: application/pgp-signature Size: 801 bytes Desc: not available URL: