From: Maxim Sloyko <maxims@google.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH 05/12] aspeed/ast2500: Device Tree and bindings for some of the clocks
Date: Wed, 4 Jan 2017 11:46:49 -0800 [thread overview]
Message-ID: <20170104194656.124368-6-maxims@google.com> (raw)
In-Reply-To: <20170104194656.124368-1-maxims@google.com>
Signed-off-by: Maxim Sloyko <maxims@google.com>
---
arch/arm/dts/ast2500.dtsi | 423 ++++++++++++++++++++++++++++++++
include/dt-bindings/clock/ast2500-scu.h | 29 +++
2 files changed, 452 insertions(+)
create mode 100644 arch/arm/dts/ast2500.dtsi
create mode 100644 include/dt-bindings/clock/ast2500-scu.h
diff --git a/arch/arm/dts/ast2500.dtsi b/arch/arm/dts/ast2500.dtsi
new file mode 100644
index 0000000000..1a2a3f7ee3
--- /dev/null
+++ b/arch/arm/dts/ast2500.dtsi
@@ -0,0 +1,423 @@
+/* This device tree is copied from
+ * https://github.com/openbmc/linux/blob/c5682cb/arch/arm/boot/dts/aspeed-g5.dtsi
+ */
+
+#include <dt-bindings/clock/ast2500-scu.h>
+
+#include "skeleton.dtsi"
+
+/ {
+ model = "Aspeed BMC";
+ compatible = "aspeed,ast2500";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ interrupt-parent = <&vic>;
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu at 0 {
+ compatible = "arm,arm1176jzf-s";
+ device_type = "cpu";
+ reg = <0>;
+ };
+ };
+
+ scu: clock-controller at 1e6e2000 {
+ compatible = "aspeed,ast2500-scu";
+ reg = <0x1e6e2000 0x1000>;
+ u-boot,dm-pre-reloc;
+ #clock-cells = <1>;
+ #reset-cells = <1>;
+ };
+
+ sdrammc: sdrammc at 1e6e0000 {
+ u-boot,dm-pre-reloc;
+ compatible = "aspeed,ast2500-sdrammc";
+ reg = <0x1e6e0000 0x174
+ 0x1e6e0200 0x1d4 >;
+ clocks = <&scu PLL_MPLL>;
+ };
+
+ ahb {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+ u-boot,dm-pre-reloc;
+
+ fmc: flash-controller at 1e620000 {
+ reg = < 0x1e620000 0xc4
+ 0x20000000 0x10000000 >;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "aspeed,ast2500-fmc";
+ status = "disabled";
+ aspeed,fmc-has-dma;
+ interrupts = <19>;
+ flash at 0 {
+ reg = < 0 >;
+ compatible = "jedec,spi-nor";
+ status = "disabled";
+ };
+ flash at 1 {
+ reg = < 1 >;
+ compatible = "jedec,spi-nor";
+ status = "disabled";
+ };
+ flash at 2 {
+ reg = < 2 >;
+ compatible = "jedec,spi-nor";
+ // compatible = "cfi,flash", "jedec,flash";
+ status = "disabled";
+ };
+ };
+
+ spi1: flash-controller at 1e630000 {
+ reg = < 0x1e630000 0xc4
+ 0x30000000 0x08000000 >;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "aspeed,ast2500-smc";
+ status = "disabled";
+ flash at 0 {
+ reg = < 0 >;
+ compatible = "jedec,spi-nor";
+ status = "disabled";
+ };
+ flash at 1 {
+ reg = < 1 >;
+ compatible = "jedec,spi-nor";
+ status = "disabled";
+ };
+ };
+
+ spi2: flash-controller at 1e631000 {
+ reg = < 0x1e631000 0xc4
+ 0x38000000 0x08000000 >;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "aspeed,ast2500-smc";
+ status = "disabled";
+ flash at 0 {
+ reg = < 0 >;
+ compatible = "jedec,spi-nor";
+ status = "disabled";
+ };
+ flash at 1 {
+ reg = < 1 >;
+ compatible = "jedec,spi-nor";
+ status = "disabled";
+ };
+ };
+
+ vic: interrupt-controller at 1e6c0080 {
+ compatible = "aspeed,ast2400-vic";
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ valid-sources = <0xfefff7ff 0x0807ffff>;
+ reg = <0x1e6c0080 0x80>;
+ };
+
+ mac0: ethernet at 1e660000 {
+ compatible = "faraday,ftgmac100";
+ reg = <0x1e660000 0x180>;
+ interrupts = <2>;
+ no-hw-checksum;
+ status = "disabled";
+ };
+
+ mac1: ethernet at 1e680000 {
+ compatible = "faraday,ftgmac100";
+ reg = <0x1e680000 0x180>;
+ interrupts = <3>;
+ no-hw-checksum;
+ status = "disabled";
+ };
+
+ apb {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+ u-boot,dm-pre-reloc;
+
+ syscon: syscon at 1e6e2000 {
+ compatible = "aspeed,g5-scu", "syscon", "simple-mfd";
+ reg = <0x1e6e2000 0x1a8>;
+ };
+
+ sram at 1e720000 {
+ compatible = "mmio-sram";
+ reg = <0x1e720000 0x9000>; // 36K
+ };
+
+ gpio: gpio at 1e780000 {
+ #gpio-cells = <2>;
+ gpio-controller;
+ compatible = "aspeed,ast2500-gpio";
+ reg = <0x1e780000 0x1000>;
+ interrupts = <20>;
+ };
+
+ timer: timer at 1e782000 {
+ compatible = "aspeed,ast2500-timer";
+ u-boot,dm-pre-reloc;
+ reg = <0x1e782000 0x90>;
+ };
+
+ ibt: ibt at 1e789140 {
+ compatible = "aspeed,bt-host";
+ reg = <0x1e789140 0x18>;
+ interrupts = <8>;
+ };
+
+ wdt1: wdt at 1e785000 {
+ compatible = "aspeed,ast2500-wdt";
+ reg = <0x1e785000 0x1c>;
+ };
+
+ wdt2: wdt at 1e785020 {
+ compatible = "aspeed,ast2500-wdt";
+ reg = <0x1e785020 0x1c>;
+ status = "disabled";
+ };
+
+ wdt3: wdt at 1e785040 {
+ compatible = "aspeed,wdt";
+ reg = <0x1e785074 0x1c>;
+ status = "disabled";
+ };
+
+ uart1: serial at 1e783000 {
+ compatible = "ns16550a";
+ reg = <0x1e783000 0x1000>;
+ reg-shift = <2>;
+ interrupts = <9>;
+ clocks = <&scu PCLK_UART1>;
+ no-loopback-test;
+ status = "disabled";
+ };
+
+ uart2: serial at 1e78d000 {
+ compatible = "ns16550a";
+ reg = <0x1e78d000 0x1000>;
+ reg-shift = <2>;
+ interrupts = <32>;
+ clocks = <&scu PCLK_UART2>;
+ no-loopback-test;
+ status = "disabled";
+ };
+
+ uart3: serial at 1e78e000 {
+ compatible = "ns16550a";
+ reg = <0x1e78e000 0x1000>;
+ reg-shift = <2>;
+ interrupts = <33>;
+ clocks = <&scu PCLK_UART3>;
+ no-loopback-test;
+ status = "disabled";
+ };
+
+ uart4: serial at 1e78f000 {
+ compatible = "ns16550a";
+ reg = <0x1e78f000 0x1000>;
+ reg-shift = <2>;
+ interrupts = <34>;
+ clocks = <&scu PCLK_UART4>;
+ no-loopback-test;
+ status = "disabled";
+ };
+
+ uart5: serial at 1e784000 {
+ compatible = "ns16550a";
+ reg = <0x1e784000 0x1000>;
+ interrupts = <10>;
+ reg-shift = <2>;
+ clocks = <&scu PCLK_UART5>;
+ no-loopback-test;
+ status = "disabled";
+ };
+
+ vuart: vuart at 1e787000 {
+ compatible = "aspeed,vuart";
+ reg = <0x1e787000 0x1000>;
+ reg-shift = <2>;
+ interrupts = <8>;
+ no-loopback-test;
+ status = "disabled";
+ };
+
+ i2c: i2c at 1e78a000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ #interrupt-cells = <1>;
+
+ compatible = "aspeed,ast2400-i2c-controller";
+ reg = <0x1e78a000 0x40>;
+ ranges = <0 0x1e78a000 0x1000>;
+ interrupts = <12>;
+ clock-ranges;
+ interrupt-controller;
+
+ i2c0: i2c-bus at 40 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x40 0x40>;
+ compatible = "aspeed,ast2400-i2c-bus";
+ bus = <0>;
+ clock-frequency = <100000>;
+ status = "disabled";
+ interrupts = <0>;
+ interrupt-parent = <&i2c>;
+ };
+
+ i2c1: i2c-bus at 80 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x80 0x40>;
+ compatible = "aspeed,ast2400-i2c-bus";
+ bus = <1>;
+ clock-frequency = <100000>;
+ status = "disabled";
+ interrupts = <1>;
+ };
+
+ i2c2: i2c-bus at c0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0xC0 0x40>;
+ compatible = "aspeed,ast2400-i2c-bus";
+ bus = <2>;
+ clock-frequency = <100000>;
+ status = "disabled";
+ interrupts = <2>;
+ };
+
+ i2c3: i2c-bus at 100 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x100 0x40>;
+ compatible = "aspeed,ast2400-i2c-bus";
+ bus = <3>;
+ clock-frequency = <100000>;
+ status = "disabled";
+ interrupts = <3>;
+ };
+
+ i2c4: i2c-bus at 140 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x140 0x40>;
+ compatible = "aspeed,ast2400-i2c-bus";
+ bus = <4>;
+ clock-frequency = <100000>;
+ status = "disabled";
+ interrupts = <4>;
+ };
+
+ i2c5: i2c-bus at 180 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x180 0x40>;
+ compatible = "aspeed,ast2400-i2c-bus";
+ bus = <5>;
+ clock-frequency = <100000>;
+ status = "disabled";
+ interrupts = <5>;
+ };
+
+ i2c6: i2c-bus at 1c0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x1C0 0x40>;
+ compatible = "aspeed,ast2400-i2c-bus";
+ bus = <6>;
+ clock-frequency = <100000>;
+ status = "disabled";
+ interrupts = <6>;
+ };
+
+ i2c7: i2c-bus at 300 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x300 0x40>;
+ compatible = "aspeed,ast2400-i2c-bus";
+ bus = <7>;
+ clock-frequency = <100000>;
+ status = "disabled";
+ interrupts = <7>;
+ };
+
+ i2c8: i2c-bus at 340 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x340 0x40>;
+ compatible = "aspeed,ast2400-i2c-bus";
+ bus = <8>;
+ clock-frequency = <100000>;
+ status = "disabled";
+ interrupts = <8>;
+ };
+
+ i2c9: i2c-bus at 380 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x380 0x40>;
+ compatible = "aspeed,ast2400-i2c-bus";
+ bus = <9>;
+ clock-frequency = <100000>;
+ status = "disabled";
+ interrupts = <9>;
+ };
+
+ i2c10: i2c-bus at 3c0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x3c0 0x40>;
+ compatible = "aspeed,ast2400-i2c-bus";
+ bus = <10>;
+ clock-frequency = <100000>;
+ status = "disabled";
+ interrupts = <10>;
+ };
+
+ i2c11: i2c-bus at 400 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x400 0x40>;
+ compatible = "aspeed,ast2400-i2c-bus";
+ bus = <11>;
+ clock-frequency = <100000>;
+ status = "disabled";
+ interrupts = <11>;
+ };
+
+ i2c12: i2c-bus at 440 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x440 0x40>;
+ compatible = "aspeed,ast2400-i2c-bus";
+ bus = <12>;
+ clock-frequency = <100000>;
+ status = "disabled";
+ interrupts = <12>;
+ };
+
+ i2c13: i2c-bus at 480 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x480 0x40>;
+ compatible = "aspeed,ast2400-i2c-bus";
+ bus = <13>;
+ clock-frequency = <100000>;
+ status = "disabled";
+ interrupts = <13>;
+ };
+
+ };
+
+ };
+ };
+};
diff --git a/include/dt-bindings/clock/ast2500-scu.h b/include/dt-bindings/clock/ast2500-scu.h
new file mode 100644
index 0000000000..ca58b12943
--- /dev/null
+++ b/include/dt-bindings/clock/ast2500-scu.h
@@ -0,0 +1,29 @@
+/*
+ * Copyright 2016 Google Inc.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+/* Core Clocks */
+#define PLL_HPLL 1
+#define PLL_DPLL 2
+#define PLL_D2PLL 3
+#define PLL_MPLL 4
+#define ARMCLK 5
+
+
+/* Bus Clocks, derived from core clocks */
+#define BCLK_PCLK 101
+#define BCLK_LHCLK 102
+#define BCLK_MACCLK 103
+#define BCLK_SDCLK 104
+#define BCLK_ARMCLK 105
+
+#define MCLK_DDR 201
+
+/* Special clocks */
+#define PCLK_UART1 501
+#define PCLK_UART2 502
+#define PCLK_UART3 503
+#define PCLK_UART4 504
+#define PCLK_UART5 505
--
2.11.0.390.gc69c2f50cf-goog
next prev parent reply other threads:[~2017-01-04 19:46 UTC|newest]
Thread overview: 90+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-01-04 19:46 [U-Boot] [PATCH 00/12] arm: aspeed: Basic support for Aspeed AST2500 part and eval board Maxim Sloyko
2017-01-04 19:46 ` [U-Boot] [PATCH 01/12] aspeed: Add mach-aspeed directory and basic Kconfig Maxim Sloyko
2017-01-04 19:58 ` Rick Altherr
2017-01-04 20:23 ` Tom Rini
2017-01-14 17:13 ` Simon Glass
2017-01-18 0:15 ` Maxim Sloyko
2017-01-04 19:46 ` [U-Boot] [PATCH 02/12] aspeed: Add support for Watchdot Timer Maxim Sloyko
2017-01-04 20:58 ` Tom Rini
2017-01-14 17:13 ` Simon Glass
2017-01-04 19:46 ` [U-Boot] [PATCH 03/12] aspeed: Add Timer Support Maxim Sloyko
2017-01-04 20:58 ` Tom Rini
2017-01-14 17:13 ` Simon Glass
2017-01-17 17:57 ` Maxim Sloyko
2017-01-17 21:37 ` Simon Glass
2017-01-17 23:59 ` Maxim Sloyko
2017-01-04 19:46 ` [U-Boot] [PATCH 04/12] aspeed: Add sysreset driver Maxim Sloyko
2017-01-14 17:14 ` Simon Glass
2017-01-04 19:46 ` Maxim Sloyko [this message]
2017-01-04 20:58 ` [U-Boot] [PATCH 05/12] aspeed/ast2500: Device Tree and bindings for some of the clocks Tom Rini
2017-01-05 1:18 ` Maxim Sloyko
2017-01-05 3:26 ` Tom Rini
2017-01-05 22:20 ` Maxim Sloyko
2017-01-14 17:13 ` Simon Glass
2017-01-17 23:27 ` Maxim Sloyko
2017-01-21 3:52 ` Simon Glass
2017-01-23 17:52 ` Maxim Sloyko
2017-01-23 19:51 ` Simon Glass
2017-01-04 19:46 ` [U-Boot] [PATCH 06/12] aspeed/ast2500: Add Clock Driver Maxim Sloyko
2017-01-14 17:14 ` Simon Glass
2017-01-17 23:18 ` Maxim Sloyko
2017-01-04 19:46 ` [U-Boot] [PATCH 07/12] aspeed/ast2500: Helper function to get access to SCU Maxim Sloyko
2017-01-14 17:14 ` Simon Glass
2017-01-17 22:27 ` Maxim Sloyko
2017-01-04 19:46 ` [U-Boot] [PATCH 08/12] aspeed/ast2500: Add SDRAM MC driver Maxim Sloyko
2017-01-14 17:14 ` Simon Glass
2017-01-18 20:16 ` Maxim Sloyko
2017-01-04 19:46 ` [U-Boot] [PATCH 09/12] aspeed/ast2500: Common board init functions for ast2500 based boards Maxim Sloyko
2017-01-14 17:14 ` Simon Glass
2017-01-17 20:17 ` Maxim Sloyko
2017-01-04 19:46 ` [U-Boot] [PATCH 10/12] aspeed: Common configuration parameters for aspeed boards Maxim Sloyko
2017-01-14 17:14 ` Simon Glass
2017-01-17 20:02 ` Maxim Sloyko
2017-01-04 19:46 ` [U-Boot] [PATCH 11/12] aspeed: Device Tree for ast2500 Eval Board Maxim Sloyko
2017-01-14 17:14 ` Simon Glass
2017-01-17 19:51 ` Maxim Sloyko
2017-01-04 19:46 ` [U-Boot] [PATCH 12/12] aspeed: Configuration for ast2500 eval board Maxim Sloyko
2017-01-14 17:14 ` Simon Glass
2017-01-17 19:46 ` Maxim Sloyko
2017-01-21 3:51 ` Simon Glass
2017-01-04 20:26 ` [U-Boot] [PATCH 00/12] arm: aspeed: Basic support for Aspeed AST2500 part and " Tom Rini
2017-01-04 22:47 ` Maxim Sloyko
2017-01-04 20:58 ` Tom Rini
2017-01-05 22:42 ` [U-Boot] [PATCH v1 0/4] " Maxim Sloyko
2017-01-05 22:42 ` [U-Boot] [PATCH v1 1/4] aspeed: Add drivers common to all Aspeed SoCs Maxim Sloyko
2017-01-05 22:42 ` [U-Boot] [PATCH v1 2/4] aspeed: Add basic ast2500 specific drivers and configuration Maxim Sloyko
2017-01-05 22:42 ` [U-Boot] [PATCH v1 3/4] aspeed: Board init functions and common configs for ast2500 based boards Maxim Sloyko
2017-01-05 22:42 ` [U-Boot] [PATCH v1 4/4] aspeed: Support for ast2500 Eval Board Maxim Sloyko
2017-01-10 1:50 ` [U-Boot] [PATCH v2 0/4] arm: aspeed: Basic support for Aspeed AST2500 part and eval board Maxim Sloyko
2017-01-10 1:50 ` [U-Boot] [PATCH v2 1/4] aspeed: Add drivers common to all Aspeed SoCs Maxim Sloyko
2017-01-11 3:20 ` Tom Rini
2017-01-10 1:50 ` [U-Boot] [PATCH v2 2/4] aspeed: Add basic ast2500 specific drivers and configuration Maxim Sloyko
2017-01-11 3:20 ` Tom Rini
2017-01-10 1:50 ` [U-Boot] [PATCH v2 3/4] aspeed: Board init functions and common configs for ast2500 based boards Maxim Sloyko
2017-01-11 3:20 ` Tom Rini
2017-01-11 23:40 ` Maxim Sloyko
2017-01-10 1:50 ` [U-Boot] [PATCH v2 4/4] aspeed: Support for ast2500 Eval Board Maxim Sloyko
2017-01-11 3:20 ` Tom Rini
2017-01-11 23:45 ` [U-Boot] [PATCH v3 0/4] arm: aspeed: Basic support for Aspeed AST2500 part and eval board Maxim Sloyko
2017-01-11 23:45 ` [U-Boot] [PATCH v3 1/4] aspeed: Add drivers common to all Aspeed SoCs Maxim Sloyko
2017-01-13 0:51 ` Tom Rini
2017-01-11 23:45 ` [U-Boot] [PATCH v3 2/4] aspeed: Add basic ast2500 specific drivers and configuration Maxim Sloyko
2017-01-11 23:45 ` [U-Boot] [PATCH v3 3/4] aspeed: Board init functions and common configs for ast2500 based boards Maxim Sloyko
2017-01-13 0:51 ` Tom Rini
2017-01-11 23:45 ` [U-Boot] [PATCH v3 4/4] aspeed: Support for ast2500 Eval Board Maxim Sloyko
2017-01-13 0:51 ` Tom Rini
2017-01-18 21:44 ` [U-Boot] [PATCH v4 0/4] arm: aspeed: Basic support for Aspeed AST2500 part and eval board Maxim Sloyko
2017-01-18 21:44 ` [U-Boot] [PATCH v4 1/4] aspeed: Add drivers common to all Aspeed SoCs Maxim Sloyko
2017-01-26 14:23 ` Simon Glass
2017-01-26 18:31 ` Maxim Sloyko
2017-01-28 22:44 ` [U-Boot] [U-Boot, v4, " Tom Rini
2017-01-18 21:44 ` [U-Boot] [PATCH v4 2/4] aspeed: Add basic ast2500-specific drivers and configuration Maxim Sloyko
2017-01-26 14:23 ` Simon Glass
2017-01-26 18:02 ` Maxim Sloyko
2017-01-28 22:44 ` [U-Boot] [U-Boot, v4, " Tom Rini
2017-01-18 21:44 ` [U-Boot] [PATCH v4 3/4] aspeed: Board init functions and common configs for ast2500 based boards Maxim Sloyko
2017-01-26 14:23 ` Simon Glass
2017-01-28 22:44 ` [U-Boot] [U-Boot, v4, " Tom Rini
2017-01-18 21:44 ` [U-Boot] [PATCH v4 4/4] aspeed: Support for ast2500 Eval Board Maxim Sloyko
2017-01-26 14:23 ` Simon Glass
2017-01-28 22:44 ` [U-Boot] [U-Boot, v4, " Tom Rini
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