From: Eddie Cai <eddie.cai.linux@gmail.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] usb: dwc2: invalidate the dcache before starting the DMA
Date: Sat, 1 Apr 2017 14:51:39 +0800 [thread overview]
Message-ID: <20170401065139.12084-1-eddie.cai.linux@gmail.com> (raw)
We should invalidate the dcache before starting the DMA. In case there are
any dirty lines from the DMA buffer in the cache, subsequent cache-line
replacements may corrupt the buffer in memory while the DMA is still going on.
Cache-line replacement can happen if the CPU tries to bring some other memory
locations into the cache while the DMA is going on.
Signed-off-by: Eddie Cai <eddie.cai.linux@gmail.com>
---
drivers/usb/host/dwc2.c | 17 +++++++++++------
1 file changed, 11 insertions(+), 6 deletions(-)
diff --git a/drivers/usb/host/dwc2.c b/drivers/usb/host/dwc2.c
index 5ac602e..a151ba6 100644
--- a/drivers/usb/host/dwc2.c
+++ b/drivers/usb/host/dwc2.c
@@ -811,12 +811,17 @@ static int transfer_chunk(struct dwc2_hc_regs *hc_regs, void *aligned_buffer,
(*pid << DWC2_HCTSIZ_PID_OFFSET),
&hc_regs->hctsiz);
- if (!in && xfer_len) {
- memcpy(aligned_buffer, buffer, xfer_len);
-
- flush_dcache_range((unsigned long)aligned_buffer,
- (unsigned long)aligned_buffer +
- roundup(xfer_len, ARCH_DMA_MINALIGN));
+ if (xfer_len) {
+ if(in){
+ invalidate_dcache_range((unsigned long)aligned_buffer,
+ (unsigned long)aligned_buffer +
+ roundup(xfer_len, ARCH_DMA_MINALIGN));
+ }else{
+ memcpy(aligned_buffer, buffer, xfer_len);
+ flush_dcache_range((unsigned long)aligned_buffer,
+ (unsigned long)aligned_buffer +
+ roundup(xfer_len, ARCH_DMA_MINALIGN));
+ }
}
writel(phys_to_bus((unsigned long)aligned_buffer), &hc_regs->hcdma);
--
2.10.2
next reply other threads:[~2017-04-01 6:51 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-04-01 6:51 Eddie Cai [this message]
2017-04-03 14:43 ` [U-Boot] usb: dwc2: invalidate the dcache before starting the DMA Brüns, Stefan
2017-04-03 19:33 ` Marek Vasut
2017-04-05 1:26 ` Kever Yang
2017-04-05 2:21 ` Simon Glass
2017-04-05 9:35 ` Marek Vasut
2017-04-05 10:08 ` Simon Glass
2017-04-05 10:21 ` Marek Vasut
2017-04-05 15:03 ` Simon Glass
2017-04-05 21:34 ` Marek Vasut
2017-04-06 1:24 ` Simon Glass
2017-04-06 1:32 ` Marek Vasut
2017-04-06 2:40 ` Simon Glass
2017-04-06 10:22 ` Marek Vasut
2017-04-06 14:06 ` Simon Glass
2017-04-06 15:33 ` Marek Vasut
2017-04-06 15:57 ` Simon Glass
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