From mboxrd@z Thu Jan 1 00:00:00 1970 From: Brock Zheng Techyauld Ltd Date: Tue, 6 Jun 2017 09:06:21 +0800 Subject: [U-Boot] [PATCH] Fixup bug in PMIC TPS65217 register address definition Message-ID: <20170606010621.GH1723@techyauld.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de The addresses of the registers in TI TPS65217 are not continuous. There is a gap between ENABLE(0x16) and DEFUVLO(0x18). No 0x17 register available. Fixup the enum values by adding a 'reserved' placeholder to correct the addresses higher than 0x17. Series-to: Heiko Schocher Signed-off-by: Brock Zheng Techyauld Ltd --- include/power/tps65217.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/power/tps65217.h b/include/power/tps65217.h index 69a49f76fe..cb07ea5ce6 100644 --- a/include/power/tps65217.h +++ b/include/power/tps65217.h @@ -38,6 +38,7 @@ enum { TPS65217_DEFLS1, TPS65217_DEFLS2, TPS65217_ENABLE, + TPS65217_RESERVED0, /* no 0x17 register available */ TPS65217_DEFUVLO, TPS65217_SEQ1, TPS65217_SEQ2, -- 2.13.0