From mboxrd@z Thu Jan 1 00:00:00 1970 From: Lukasz Majewski Date: Wed, 7 Jun 2017 09:25:02 +0200 Subject: [U-Boot] [PATCH] Fixup bug in PMIC TPS65217 register address definition In-Reply-To: <20170606010621.GH1723@techyauld.com> References: <20170606010621.GH1723@techyauld.com> Message-ID: <20170607092502.67b3e7d6@jawa> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On Tue, 6 Jun 2017 09:06:21 +0800 Brock Zheng Techyauld Ltd wrote: > The addresses of the registers in TI TPS65217 are not continuous. > There is a gap between ENABLE(0x16) and DEFUVLO(0x18). No 0x17 > register available. > > Fixup the enum values by adding a 'reserved' placeholder to > correct the addresses higher than 0x17. > > Series-to: Heiko Schocher > > Signed-off-by: Brock Zheng Techyauld Ltd > --- > > include/power/tps65217.h | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/include/power/tps65217.h b/include/power/tps65217.h > index 69a49f76fe..cb07ea5ce6 100644 > --- a/include/power/tps65217.h > +++ b/include/power/tps65217.h > @@ -38,6 +38,7 @@ enum { > TPS65217_DEFLS1, > TPS65217_DEFLS2, > TPS65217_ENABLE, > + TPS65217_RESERVED0, /* no 0x17 register available */ > TPS65217_DEFUVLO, > TPS65217_SEQ1, > TPS65217_SEQ2, Reviewed-by: Lukasz Majewski Best regards, Lukasz Majewski -- DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de