[U-Boot] [PATCH v2 1/1] mx7sabresd: Set VLD04 output to 2.8V in PMIC initialization.

[Gautam Bhat <mindentropy@gmail.com>]

This change sets the VLDO4 settings output to 2.8V in PMIC
initialization so that the MIPI DSI/CSI input voltage is 2.8V
as per the schematics. The original code provides an output of
3.3V which violates the voltage mentioned in the schematics.

Acked-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Gautam Bhat <mindentropy@gmail.com>
---

Changes in v2:
- Removed extra parentheses for 0xF.
- Modified subject and commit messages as per the recommendation.

 board/freescale/mx7dsabresd/mx7dsabresd.c | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/board/freescale/mx7dsabresd/mx7dsabresd.c b/board/freescale/mx7dsabresd/mx7dsabresd.c
index ecea5a529a..c9ff2d8e40 100644
--- a/board/freescale/mx7dsabresd/mx7dsabresd.c
+++ b/board/freescale/mx7dsabresd/mx7dsabresd.c
@@ -341,6 +341,7 @@ int power_init_board(void)
 {
 	struct udevice *dev;
 	int ret, dev_id, rev_id;
+	uint regval;
 
 	ret = pmic_get("pfuze3000", &dev);
 	if (ret == -ENODEV)
@@ -354,6 +355,15 @@ int power_init_board(void)
 
 	pmic_clrsetbits(dev, PFUZE3000_LDOGCTL, 0, 1);
 
+	/*
+	 * Set the voltage of VLDO4 output to 2.8V which feeds
+	 * the MIPI DSI and MIPI CSI inputs.
+	 */
+	regval = pmic_reg_read(dev, PFUZE3000_VLD4CTL);
+	regval &= ~0xF;
+	regval |= 0xA; /* Set to 2.8V */
+	pmic_reg_write(dev, PFUZE3000_VLD4CTL, regval);
+
 	return 0;
 }
 #endif
-- 
2.11.0