From mboxrd@z Thu Jan 1 00:00:00 1970 From: Angelo Dureghello Date: Fri, 14 Jul 2017 23:44:03 +0200 Subject: [U-Boot] [PATCH] m68k: mcf5445x: allow CS0 to be undefined Message-ID: <20170714214403.14166-1-angelo@sysam.it> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On some boards, CONFIG_SYS_CS0_BASE can be undefined, since CS0 is not connected to any signal. Signed-off-by: Angelo Dureghello --- arch/m68k/cpu/mcf5445x/cpu_init.c | 2 ++ arch/m68k/cpu/mcf5445x/start.S | 4 ++++ 2 files changed, 6 insertions(+) diff --git a/arch/m68k/cpu/mcf5445x/cpu_init.c b/arch/m68k/cpu/mcf5445x/cpu_init.c index b4a8eefa94..5d2b116be1 100644 --- a/arch/m68k/cpu/mcf5445x/cpu_init.c +++ b/arch/m68k/cpu/mcf5445x/cpu_init.c @@ -205,6 +205,7 @@ void cpu_init_f(void) /* FlexBus Chipselect */ init_fbcs(); +#ifdef CONFIG_SYS_CS0_BASE /* * now the flash base address is no longer at 0 (Newer ColdFire family * boot at address 0 instead of 0xFFnn_nnnn). The vector table must @@ -212,6 +213,7 @@ void cpu_init_f(void) */ if (CONFIG_SYS_CS0_BASE != 0) setvbr(CONFIG_SYS_CS0_BASE); +#endif icache_enable(); } diff --git a/arch/m68k/cpu/mcf5445x/start.S b/arch/m68k/cpu/mcf5445x/start.S index 0487d84a2f..123bbd80b8 100644 --- a/arch/m68k/cpu/mcf5445x/start.S +++ b/arch/m68k/cpu/mcf5445x/start.S @@ -159,6 +159,7 @@ asm_dram_init: move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET), %sp clr.l %sp at - +#ifdef CONFIG_SYS_CS0_BASE /* Must disable global address */ move.l #0xFC008000, %a1 move.l #(CONFIG_SYS_CS0_BASE), (%a1) @@ -166,6 +167,7 @@ asm_dram_init: move.l #(CONFIG_SYS_CS0_CTRL), (%a1) move.l #0xFC008004, %a1 move.l #(CONFIG_SYS_CS0_MASK), (%a1) +#endif #endif /* CONFIG_CF_SBF */ #ifdef CONFIG_MCF5441x @@ -507,6 +509,7 @@ asm_nand_init: movec %d0, %ACR2 movec %d0, %ACR3 +#ifdef CONFIG_SYS_CS0_BASE /* Must disable global address */ move.l #0xFC008000, %a1 move.l #(CONFIG_SYS_CS0_BASE), (%a1) @@ -514,6 +517,7 @@ asm_nand_init: move.l #(CONFIG_SYS_CS0_CTRL), (%a1) move.l #0xFC008004, %a1 move.l #(CONFIG_SYS_CS0_MASK), (%a1) +#endif /* NAND port configuration */ move.l #0xEC094048, %a1 -- 2.13.2