From mboxrd@z Thu Jan 1 00:00:00 1970 From: Thomas Petazzoni Date: Thu, 14 Sep 2017 00:27:45 +0200 Subject: [U-Boot] [PATCH] serial: serial_sh: take into account port->clk_mode for SH7785/7786 In-Reply-To: <20170828121638.13751-1-thomas.petazzoni@free-electrons.com> References: <20170828121638.13751-1-thomas.petazzoni@free-electrons.com> Message-ID: <20170914002745.23eb3c64@windsurf> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Hello, On Mon, 28 Aug 2017 14:16:38 +0200, Thomas Petazzoni wrote: > In the SH7785/SH7786 case, the SCSCR value is harcoded to be 0x3a, > which means bits CKE1/CKE0 have the value 10b. This tells the SCIF > that the "External clock/SCIF_SCK pin functions as clock input". > > However, this is not the case in all designs, and it's the purpose of > the clk_mode = EXT_CLK to indicate such a setting. > > In order for the serial_sh driver to work on a SH7786 platform that > does not use SCIF_SCK as a clock input, we have to adjust the > SCSCR_INIT value, to have CKE1/CKE0 set to 00b. This is similar to > what is done for other SH platforms. > > Signed-off-by: Thomas Petazzoni Any comments on this patch ? Thanks, Thomas -- Thomas Petazzoni, CTO, Free Electrons Embedded Linux and Kernel engineering http://free-electrons.com