From mboxrd@z Thu Jan 1 00:00:00 1970 From: Lothar =?UTF-8?B?V2HDn21hbm4=?= Date: Wed, 4 Oct 2017 09:05:00 +0200 Subject: [U-Boot] [PATCH] imx: serial: Wait for ongoing transmission to finish before serial reset In-Reply-To: <1507022205-11877-1-git-send-email-lukma@denx.de> References: <1507022205-11877-1-git-send-email-lukma@denx.de> Message-ID: <20171004090500.1b4585bd@karo-electronics.de> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 8bit To: u-boot@lists.denx.de Hi, On Tue, 3 Oct 2017 11:16:45 +0200 Lukasz Majewski wrote: > It may happen that the MXC serial IP block is performing some ongoing > transmission (started at e.g. board_init()) when the "initr_serial" is > called. > > As a result the serial port IP block is reset, so transmitted data is > corrupted: > > I2C: ready > DRAM: 1 GiB > jSS('HH��SL_SDHC: 04 rev 0x0 > > This patch prevents from this situation, by waiting for transmission > complete bit set (UART Status Register 2 (UARTx_USR2), bit TXDC): > > I2C: ready > DRAM: 1 GiB > ID: unit type 0x4 rev 0x0 > > Signed-off-by: Lukasz Majewski > --- > > drivers/serial/serial_mxc.c | 7 +++++++ > 1 file changed, 7 insertions(+) > > diff --git a/drivers/serial/serial_mxc.c b/drivers/serial/serial_mxc.c > index cce80a8..ef4eb12 100644 > --- a/drivers/serial/serial_mxc.c > +++ b/drivers/serial/serial_mxc.c > @@ -141,6 +141,13 @@ struct mxc_uart { > > static void _mxc_serial_init(struct mxc_uart *base) > { > + /* > + * Wait for any ongoing transmission to finish - for example > + * from pre-relocation enabled UART > + */ > + while (!(readl(&base->sr2) & USR2_TXDC)) > + ; > + > Loops that poll for HW activated bits should always have a timeout. Hardware will definitely break some day and deliver unexpected results. Software should cope with this as best as it can! Lothar Waßmann