[U-Boot] [PATCH] gpt: Use cache aligned buffers for gpt_h and gpt_e

[U-Boot] [PATCH] gpt: Use cache aligned buffers for gpt_h and gpt_e

[Lukasz Majewski]

Before this patch one could receive following errors when executing
"gpt write" command on machine with cache enabled:

display5 factory > gpt write mmc ${mmcdev} ${partitions}
Writing GPT:
CACHE: Misaligned operation at range [4ef8f7f0, 4ef8f9f0]
CACHE: Misaligned operation at range [4ef8f9f8, 4ef939f8]
CACHE: Misaligned operation at range [4ef8f9f8, 4ef939f8]
CACHE: Misaligned operation at range [4ef8f7f0, 4ef8f9f0]
success!

To alleviate this problem - the calloc()s have been replaced with
malloc_cache_aligned() and memset().

After those changes the buffers are properly aligned (with both start
address and size) to SoC cache line.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
---

 disk/part_efi.c | 16 +++++++++-------
 1 file changed, 9 insertions(+), 7 deletions(-)

diff --git a/disk/part_efi.c b/disk/part_efi.c
index 7862bee..f6f5bee 100644
--- a/disk/part_efi.c
+++ b/disk/part_efi.c
@@ -622,25 +622,27 @@ int gpt_fill_header(struct blk_desc *dev_desc, gpt_header *gpt_h,
 int gpt_restore(struct blk_desc *dev_desc, char *str_disk_guid,
 		disk_partition_t *partitions, int parts_count)
 {
-	int ret;
-
-	gpt_header *gpt_h = calloc(1, PAD_TO_BLOCKSIZE(sizeof(gpt_header),
-						       dev_desc));
+	gpt_header *gpt_h;
 	gpt_entry *gpt_e;
+	int ret, size;
 
+	size = PAD_TO_BLOCKSIZE(sizeof(gpt_header), dev_desc);
+	gpt_h = malloc_cache_aligned(size);
 	if (gpt_h == NULL) {
 		printf("%s: calloc failed!\n", __func__);
 		return -1;
 	}
+	memset(gpt_h, 0, size);
 
-	gpt_e = calloc(1, PAD_TO_BLOCKSIZE(GPT_ENTRY_NUMBERS
-					       * sizeof(gpt_entry),
-					       dev_desc));
+	size = PAD_TO_BLOCKSIZE(GPT_ENTRY_NUMBERS * sizeof(gpt_entry),
+				dev_desc);
+	gpt_e = malloc_cache_aligned(size);
 	if (gpt_e == NULL) {
 		printf("%s: calloc failed!\n", __func__);
 		free(gpt_h);
 		return -1;
 	}
+	memset(gpt_e, 0, size);
 
 	/* Generate Primary GPT header (LBA1) */
 	ret = gpt_fill_header(dev_desc, gpt_h, str_disk_guid, parts_count);
-- 
2.1.4

[U-Boot] [PATCH] gpt: Use cache aligned buffers for gpt_h and gpt_e

[Lukasz Majewski]

On Fri, 27 Oct 2017 12:28:10 +0200
Lukasz Majewski <lukma@denx.de> wrote:

> Before this patch one could receive following errors when executing
> "gpt write" command on machine with cache enabled:
> 
> display5 factory > gpt write mmc ${mmcdev} ${partitions}
> Writing GPT:
> CACHE: Misaligned operation at range [4ef8f7f0, 4ef8f9f0]
> CACHE: Misaligned operation at range [4ef8f9f8, 4ef939f8]
> CACHE: Misaligned operation at range [4ef8f9f8, 4ef939f8]
> CACHE: Misaligned operation at range [4ef8f7f0, 4ef8f9f0]
> success!
> 
> To alleviate this problem - the calloc()s have been replaced with
> malloc_cache_aligned() and memset().
> 
> After those changes the buffers are properly aligned (with both start
> address and size) to SoC cache line.

Any feedback?

This patch seems like a good candidate for v2017.11 (as a fix to gpt
command)

Best regards,

Lukasz Majewski

--

DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
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[U-Boot] gpt: Use cache aligned buffers for gpt_h and gpt_e

[Tom Rini]

On Fri, Oct 27, 2017 at 12:28:10PM +0200, Lukasz Majewski wrote:

> Before this patch one could receive following errors when executing
> "gpt write" command on machine with cache enabled:
> 
> display5 factory > gpt write mmc ${mmcdev} ${partitions}
> Writing GPT:
> CACHE: Misaligned operation at range [4ef8f7f0, 4ef8f9f0]
> CACHE: Misaligned operation at range [4ef8f9f8, 4ef939f8]
> CACHE: Misaligned operation at range [4ef8f9f8, 4ef939f8]
> CACHE: Misaligned operation at range [4ef8f7f0, 4ef8f9f0]
> success!
> 
> To alleviate this problem - the calloc()s have been replaced with
> malloc_cache_aligned() and memset().
> 
> After those changes the buffers are properly aligned (with both start
> address and size) to SoC cache line.
> 
> Signed-off-by: Lukasz Majewski <lukma@denx.de>

Applied to u-boot/master, thanks!

-- 
Tom
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