[U-Boot] [PATCH 0/2] clk: at91: clk-generated: Improvement

[U-Boot] [PATCH 0/2] clk: at91: clk-generated: Improvement

[Wenyou Yang]

The purpose of the patch set is to fix the the incorrect assignment
of the generic clock  source selection, and to align to the Linux
kernel driver, instead of selecting the closest inferior rate, select
the absolute closest rate.


Ludovic Desroches (1):
  clk: at91: clk-generated: select absolute closest rate

Wenyou Yang (1):
  clk: at91: clk-generated: fix incorrect index of clk source

 drivers/clk/at91/clk-generated.c | 18 +++++++++---------
 1 file changed, 9 insertions(+), 9 deletions(-)

-- 
2.13.0

[U-Boot] [PATCH 1/2] clk: at91: clk-generated: select absolute closest rate

[Wenyou Yang]

From: Ludovic Desroches <ludovic.desroches@microchip.com>

To get the same behavior as the Linux driver, instead of selecting
the closest inferior rate, select the closest inferior or superior
rate

Signed-off-by: Ludovic Desroches <ludovic.desroches@microchip.com>
Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
---

 drivers/clk/at91/clk-generated.c | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/drivers/clk/at91/clk-generated.c b/drivers/clk/at91/clk-generated.c
index 8c9a3cb053..461b5b2c9a 100644
--- a/drivers/clk/at91/clk-generated.c
+++ b/drivers/clk/at91/clk-generated.c
@@ -98,9 +98,7 @@ static ulong generic_clk_set_rate(struct clk *clk, ulong rate)
 
 		for (div = 1; div < GENERATED_MAX_DIV + 2; div++) {
 			tmp_rate = DIV_ROUND_CLOSEST(parent_rate, div);
-			if (rate < tmp_rate)
-				continue;
-			tmp_diff = rate - tmp_rate;
+			tmp_diff = abs(rate - tmp_rate);
 
 			if (best_diff < 0 || best_diff > tmp_diff) {
 				best_rate = tmp_rate;
-- 
2.13.0

[U-Boot] [U-Boot, 1/2] clk: at91: clk-generated: select absolute closest rate

[Tom Rini]

On Fri, Nov 17, 2017 at 02:50:21PM +0800, Wenyou Yang wrote:

> From: Ludovic Desroches <ludovic.desroches@microchip.com>
> 
> To get the same behavior as the Linux driver, instead of selecting
> the closest inferior rate, select the closest inferior or superior
> rate
> 
> Signed-off-by: Ludovic Desroches <ludovic.desroches@microchip.com>
> Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>

Applied to u-boot/master, thanks!

-- 
Tom
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[U-Boot] [PATCH 2/2] clk: at91: clk-generated: fix incorrect index of clk source

[Wenyou Yang]

Differentiate the generic clock source selection value from the parent
clock index to fix the incorrect assignment of the generic clock
source selection.

Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
---

 drivers/clk/at91/clk-generated.c | 14 ++++++++------
 1 file changed, 8 insertions(+), 6 deletions(-)

diff --git a/drivers/clk/at91/clk-generated.c b/drivers/clk/at91/clk-generated.c
index 461b5b2c9a..2aacbaef0c 100644
--- a/drivers/clk/at91/clk-generated.c
+++ b/drivers/clk/at91/clk-generated.c
@@ -53,16 +53,17 @@ static ulong generic_clk_get_rate(struct clk *clk)
 	struct clk parent;
 	ulong clk_rate;
 	u32 tmp, gckdiv;
-	u8 parent_id;
+	u8 clock_source, parent_index;
 	int ret;
 
 	writel(clk->id & AT91_PMC_PCR_PID_MASK, &pmc->pcr);
 	tmp = readl(&pmc->pcr);
-	parent_id = (tmp >> AT91_PMC_PCR_GCKCSS_OFFSET) &
+	clock_source = (tmp >> AT91_PMC_PCR_GCKCSS_OFFSET) &
 		    AT91_PMC_PCR_GCKCSS_MASK;
 	gckdiv = (tmp >> AT91_PMC_PCR_GCKDIV_OFFSET) & AT91_PMC_PCR_GCKDIV_MASK;
 
-	ret = clk_get_by_index(dev_get_parent(clk->dev), parent_id, &parent);
+	parent_index = clock_source - 1;
+	ret = clk_get_by_index(dev_get_parent(clk->dev), parent_index, &parent);
 	if (ret)
 		return 0;
 
@@ -82,7 +83,7 @@ static ulong generic_clk_set_rate(struct clk *clk, ulong rate)
 	ulong tmp_rate, best_rate = rate, parent_rate;
 	int tmp_diff, best_diff = -1;
 	u32 div, best_div = 0;
-	u8 best_parent_id = 0;
+	u8 best_parent_index, best_clock_source = 0;
 	u8 i;
 	u32 tmp;
 	int ret;
@@ -106,7 +107,8 @@ static ulong generic_clk_set_rate(struct clk *clk, ulong rate)
 
 				best_div = div - 1;
 				best_parent = parent;
-				best_parent_id = i;
+				best_parent_index = i;
+				best_clock_source = best_parent_index + 1;
 			}
 
 			if (!best_diff || tmp_rate < rate)
@@ -127,7 +129,7 @@ static ulong generic_clk_set_rate(struct clk *clk, ulong rate)
 	writel(clk->id & AT91_PMC_PCR_PID_MASK, &pmc->pcr);
 	tmp = readl(&pmc->pcr);
 	tmp &= ~(AT91_PMC_PCR_GCKDIV | AT91_PMC_PCR_GCKCSS);
-	tmp |= AT91_PMC_PCR_GCKCSS_(best_parent_id) |
+	tmp |= AT91_PMC_PCR_GCKCSS_(best_clock_source) |
 	       AT91_PMC_PCR_CMD_WRITE |
 	       AT91_PMC_PCR_GCKDIV_(best_div) |
 	       AT91_PMC_PCR_GCKEN;
-- 
2.13.0

[U-Boot] [U-Boot, 2/2] clk: at91: clk-generated: fix incorrect index of clk source

[Tom Rini]

On Fri, Nov 17, 2017 at 02:50:22PM +0800, Wenyou Yang wrote:

> Differentiate the generic clock source selection value from the parent
> clock index to fix the incorrect assignment of the generic clock
> source selection.
> 
> Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>

Applied to u-boot/master, thanks!

-- 
Tom
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