[U-Boot] [PATCH] armv8: mmu: fix page table mapping

[U-Boot] [PATCH] armv8: mmu: fix page table mapping

[Peng Fan]

To page mapping the lowest 2 bits needs to be 0x3.
If not fix this, the final lowest 3 bits for page mapping is 0x1
which is marked as reserved.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
 arch/arm/cpu/armv8/cache_v8.c    | 5 ++++-
 arch/arm/include/asm/armv8/mmu.h | 1 +
 2 files changed, 5 insertions(+), 1 deletion(-)

diff --git a/arch/arm/cpu/armv8/cache_v8.c b/arch/arm/cpu/armv8/cache_v8.c
index adc7e1746f..6548f3c912 100644
--- a/arch/arm/cpu/armv8/cache_v8.c
+++ b/arch/arm/cpu/armv8/cache_v8.c
@@ -230,7 +230,10 @@ static void add_map(struct mm_region *map)
 				/* Page fits, create block PTE */
 				debug("Setting PTE %p to block virt=%llx\n",
 				      pte, virt);
-				*pte = phys | attrs;
+				if (level == 3)
+					*pte = phys | attrs | PTE_TYPE_PAGE;
+				else
+					*pte = phys | attrs;
 				virt += blocksize;
 				phys += blocksize;
 				size -= blocksize;
diff --git a/arch/arm/include/asm/armv8/mmu.h b/arch/arm/include/asm/armv8/mmu.h
index 6121aab547..765914c7e2 100644
--- a/arch/arm/include/asm/armv8/mmu.h
+++ b/arch/arm/include/asm/armv8/mmu.h
@@ -43,6 +43,7 @@
 #define PTE_TYPE_MASK		(3 << 0)
 #define PTE_TYPE_FAULT		(0 << 0)
 #define PTE_TYPE_TABLE		(3 << 0)
+#define PTE_TYPE_PAGE		(3 << 0)
 #define PTE_TYPE_BLOCK		(1 << 0)
 #define PTE_TYPE_VALID		(1 << 0)
 
-- 
2.14.1

[U-Boot] [PATCH] armv8: mmu: fix page table mapping

[York Sun]

On 11/27/2017 06:32 PM, Peng Fan wrote:
> To page mapping the lowest 2 bits needs to be 0x3.
> If not fix this, the final lowest 3 bits for page mapping is 0x1
> which is marked as reserved.
> 
> Signed-off-by: Peng Fan <peng.fan@nxp.com>
> ---
>  arch/arm/cpu/armv8/cache_v8.c    | 5 ++++-
>  arch/arm/include/asm/armv8/mmu.h | 1 +
>  2 files changed, 5 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/arm/cpu/armv8/cache_v8.c b/arch/arm/cpu/armv8/cache_v8.c
> index adc7e1746f..6548f3c912 100644
> --- a/arch/arm/cpu/armv8/cache_v8.c
> +++ b/arch/arm/cpu/armv8/cache_v8.c
> @@ -230,7 +230,10 @@ static void add_map(struct mm_region *map)
>  				/* Page fits, create block PTE */
>  				debug("Setting PTE %p to block virt=%llx\n",
>  				      pte, virt);
> -				*pte = phys | attrs;
> +				if (level == 3)
> +					*pte = phys | attrs | PTE_TYPE_PAGE;
> +				else
> +					*pte = phys | attrs;
>  				virt += blocksize;
>  				phys += blocksize;
>  				size -= blocksize;
> diff --git a/arch/arm/include/asm/armv8/mmu.h b/arch/arm/include/asm/armv8/mmu.h
> index 6121aab547..765914c7e2 100644
> --- a/arch/arm/include/asm/armv8/mmu.h
> +++ b/arch/arm/include/asm/armv8/mmu.h
> @@ -43,6 +43,7 @@
>  #define PTE_TYPE_MASK		(3 << 0)
>  #define PTE_TYPE_FAULT		(0 << 0)
>  #define PTE_TYPE_TABLE		(3 << 0)
> +#define PTE_TYPE_PAGE		(3 << 0)
>  #define PTE_TYPE_BLOCK		(1 << 0)
>  #define PTE_TYPE_VALID		(1 << 0)
>  
> 

This looks familiar. We are lucky not hitting this issue earlier.

Reviewed-by: York Sun <york.sun@nxp.com>

[U-Boot] armv8: mmu: fix page table mapping

[Tom Rini]

On Tue, Nov 28, 2017 at 10:31:28AM +0800, Peng Fan wrote:

> To page mapping the lowest 2 bits needs to be 0x3.
> If not fix this, the final lowest 3 bits for page mapping is 0x1
> which is marked as reserved.
> 
> Signed-off-by: Peng Fan <peng.fan@nxp.com>
> Reviewed-by: York Sun <york.sun@nxp.com>

Applied to u-boot/master, thanks!

-- 
Tom
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