[U-Boot] [PATCH v5 08/20] arm: socfpga: Fix with the correct polling on bit is set

tien.fong.chee at intel.com
2017-12-05T07:57:58Z

Commit 2baa997240d ("arm: socfpga: Add FPGA driver support for Arria 10")
Polling on wrong cleared bit. Fix with correct polling on bit is set.

Fixes: 2baa997240d ("arm: socfpga: Add FPGA driver support for Arria 10")

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
---
drivers/fpga/socfpga_arria10.c | 7 ++++---
1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/drivers/fpga/socfpga_arria10.c b/drivers/fpga/socfpga_arria10.c
index 5c1a68a..e076bda 100644
--- a/drivers/fpga/socfpga_arria10.c
+++ b/drivers/fpga/socfpga_arria10.c
@@ -112,13 +112,14 @@ static int wait_for_nconfig_pin_and_nstatus_pin(void)
unsigned long mask = ALT_FPGAMGR_IMGCFG_STAT_F2S_NCONFIG_PIN_SET_MSK |
ALT_FPGAMGR_IMGCFG_STAT_F2S_NSTATUS_PIN_SET_MSK;

- /* Poll until f2s_nconfig_pin and f2s_nstatus_pin; loop until de-asserted,
- * timeout at 1000ms
+ /*
+ * Poll until f2s_nconfig_pin and f2s_nstatus_pin; loop until
+ * de-asserted, timeout at 1000ms
*/
return wait_for_bit(__func__,
&fpga_manager_base->imgcfg_stat,
mask,
- false, FPGA_TIMEOUT_MSEC, false);
+ true, FPGA_TIMEOUT_MSEC, false);
}

static int wait_for_f2s_nstatus_pin(unsigned long value)
--
2.2.0