* [U-Boot] [PATCH 0/3] mips: bmips: add BCM6368 SoC support
@ 2018-01-20 10:53 Álvaro Fernández Rojas
2018-01-20 10:53 ` [U-Boot] [PATCH 1/3] dm: cpu: bmips: add BCM6368 support Álvaro Fernández Rojas
` (4 more replies)
0 siblings, 5 replies; 12+ messages in thread
From: Álvaro Fernández Rojas @ 2018-01-20 10:53 UTC (permalink / raw)
To: u-boot
BCM6368 is a dual core BCM63xx SoC.
Álvaro Fernández Rojas (3):
dm: cpu: bmips: add BCM6368 support
MIPS: add support for Broadcom MIPS BCM6368 SoC family
MIPS: add BMIPS Comtrend WAP-5813n board
arch/mips/dts/brcm,bcm6368.dtsi | 168 ++++++++++++++++++++++++++++++
arch/mips/dts/comtrend,wap-5813n.dts | 65 ++++++++++++
arch/mips/mach-bmips/Kconfig | 24 +++++
board/comtrend/wap5813n/Kconfig | 12 +++
board/comtrend/wap5813n/MAINTAINERS | 6 ++
board/comtrend/wap5813n/Makefile | 5 +
board/comtrend/wap5813n/wap-5813n.c | 7 ++
configs/comtrend_wap5813n_ram_defconfig | 45 ++++++++
drivers/cpu/bmips_cpu.c | 36 +++++++
include/configs/bmips_bcm6368.h | 30 ++++++
include/configs/comtrend_wap5813n.h | 19 ++++
include/dt-bindings/clock/bcm6368-clock.h | 31 ++++++
include/dt-bindings/reset/bcm6368-reset.h | 22 ++++
13 files changed, 470 insertions(+)
create mode 100644 arch/mips/dts/brcm,bcm6368.dtsi
create mode 100644 arch/mips/dts/comtrend,wap-5813n.dts
create mode 100644 board/comtrend/wap5813n/Kconfig
create mode 100644 board/comtrend/wap5813n/MAINTAINERS
create mode 100644 board/comtrend/wap5813n/Makefile
create mode 100644 board/comtrend/wap5813n/wap-5813n.c
create mode 100644 configs/comtrend_wap5813n_ram_defconfig
create mode 100644 include/configs/bmips_bcm6368.h
create mode 100644 include/configs/comtrend_wap5813n.h
create mode 100644 include/dt-bindings/clock/bcm6368-clock.h
create mode 100644 include/dt-bindings/reset/bcm6368-reset.h
--
2.11.0
^ permalink raw reply [flat|nested] 12+ messages in thread
* [U-Boot] [PATCH 1/3] dm: cpu: bmips: add BCM6368 support
2018-01-20 10:53 [U-Boot] [PATCH 0/3] mips: bmips: add BCM6368 SoC support Álvaro Fernández Rojas
@ 2018-01-20 10:53 ` Álvaro Fernández Rojas
2018-01-20 10:53 ` [U-Boot] [PATCH 2/3] MIPS: add support for Broadcom MIPS BCM6368 SoC family Álvaro Fernández Rojas
` (3 subsequent siblings)
4 siblings, 0 replies; 12+ messages in thread
From: Álvaro Fernández Rojas @ 2018-01-20 10:53 UTC (permalink / raw)
To: u-boot
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
---
drivers/cpu/bmips_cpu.c | 36 ++++++++++++++++++++++++++++++++++++
1 file changed, 36 insertions(+)
diff --git a/drivers/cpu/bmips_cpu.c b/drivers/cpu/bmips_cpu.c
index 1eb744adcd..2e3f1de74e 100644
--- a/drivers/cpu/bmips_cpu.c
+++ b/drivers/cpu/bmips_cpu.c
@@ -46,6 +46,17 @@ DECLARE_GLOBAL_DATA_PTR;
#define DMIPSPLLCFG_6358_N2_SHIFT 29
#define DMIPSPLLCFG_6358_N2_MASK (0x7 << DMIPSPLLCFG_6358_N2_SHIFT)
+#define REG_BCM6368_DDR_DMIPSPLLCFG 0x12a0
+#define DMIPSPLLCFG_6368_P1_SHIFT 0
+#define DMIPSPLLCFG_6368_P1_MASK (0xf << DMIPSPLLCFG_6368_P1_SHIFT)
+#define DMIPSPLLCFG_6368_P2_SHIFT 4
+#define DMIPSPLLCFG_6368_P2_MASK (0xf << DMIPSPLLCFG_6368_P2_SHIFT)
+#define DMIPSPLLCFG_6368_NDIV_SHIFT 16
+#define DMIPSPLLCFG_6368_NDIV_MASK (0x1ff << DMIPSPLLCFG_6368_NDIV_SHIFT)
+#define REG_BCM6368_DDR_DMIPSPLLDIV 0x12a4
+#define DMIPSPLLDIV_6368_MDIV_SHIFT 0
+#define DMIPSPLLDIV_6368_MDIV_MASK (0xff << DMIPSPLLDIV_6368_MDIV_SHIFT)
+
#define REG_BCM63268_MISC_STRAPBUS 0x1814
#define STRAPBUS_63268_FCVO_SHIFT 21
#define STRAPBUS_63268_FCVO_MASK (0xf << STRAPBUS_63268_FCVO_SHIFT)
@@ -157,6 +168,22 @@ static ulong bcm6358_get_cpu_freq(struct bmips_cpu_priv *priv)
return (16 * 1000000 * n1 * n2) / m1;
}
+static ulong bcm6368_get_cpu_freq(struct bmips_cpu_priv *priv)
+{
+ unsigned int tmp, p1, p2, ndiv, m1;
+
+ tmp = readl_be(priv->regs + REG_BCM6368_DDR_DMIPSPLLCFG);
+ p1 = (tmp & DMIPSPLLCFG_6368_P1_MASK) >> DMIPSPLLCFG_6368_P1_SHIFT;
+ p2 = (tmp & DMIPSPLLCFG_6368_P2_MASK) >> DMIPSPLLCFG_6368_P2_SHIFT;
+ ndiv = (tmp & DMIPSPLLCFG_6368_NDIV_MASK) >>
+ DMIPSPLLCFG_6368_NDIV_SHIFT;
+
+ tmp = readl_be(priv->regs + REG_BCM6368_DDR_DMIPSPLLDIV);
+ m1 = (tmp & DMIPSPLLDIV_6368_MDIV_MASK) >> DMIPSPLLDIV_6368_MDIV_SHIFT;
+
+ return (((64 * 1000000) / p1) * p2 * ndiv) / m1;
+}
+
static ulong bcm63268_get_cpu_freq(struct bmips_cpu_priv *priv)
{
unsigned int mips_pll_fcvo;
@@ -230,6 +257,12 @@ static const struct bmips_cpu_hw bmips_cpu_bcm6358 = {
.get_cpu_count = bcm6358_get_cpu_count,
};
+static const struct bmips_cpu_hw bmips_cpu_bcm6368 = {
+ .get_cpu_desc = bmips_short_cpu_desc,
+ .get_cpu_freq = bcm6368_get_cpu_freq,
+ .get_cpu_count = bcm6358_get_cpu_count,
+};
+
static const struct bmips_cpu_hw bmips_cpu_bcm63268 = {
.get_cpu_desc = bmips_long_cpu_desc,
.get_cpu_freq = bcm63268_get_cpu_freq,
@@ -327,6 +360,9 @@ static const struct udevice_id bmips_cpu_ids[] = {
.compatible = "brcm,bcm6358-cpu",
.data = (ulong)&bmips_cpu_bcm6358,
}, {
+ .compatible = "brcm,bcm6368-cpu",
+ .data = (ulong)&bmips_cpu_bcm6368,
+ }, {
.compatible = "brcm,bcm63268-cpu",
.data = (ulong)&bmips_cpu_bcm63268,
},
--
2.11.0
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [U-Boot] [PATCH 2/3] MIPS: add support for Broadcom MIPS BCM6368 SoC family
2018-01-20 10:53 [U-Boot] [PATCH 0/3] mips: bmips: add BCM6368 SoC support Álvaro Fernández Rojas
2018-01-20 10:53 ` [U-Boot] [PATCH 1/3] dm: cpu: bmips: add BCM6368 support Álvaro Fernández Rojas
@ 2018-01-20 10:53 ` Álvaro Fernández Rojas
2018-01-20 10:53 ` [U-Boot] [PATCH 3/3] MIPS: add BMIPS Comtrend WAP-5813n board Álvaro Fernández Rojas
` (2 subsequent siblings)
4 siblings, 0 replies; 12+ messages in thread
From: Álvaro Fernández Rojas @ 2018-01-20 10:53 UTC (permalink / raw)
To: u-boot
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
---
arch/mips/dts/brcm,bcm6368.dtsi | 168 ++++++++++++++++++++++++++++++
arch/mips/mach-bmips/Kconfig | 24 +++++
include/configs/bmips_bcm6368.h | 30 ++++++
include/dt-bindings/clock/bcm6368-clock.h | 31 ++++++
include/dt-bindings/reset/bcm6368-reset.h | 22 ++++
5 files changed, 275 insertions(+)
create mode 100644 arch/mips/dts/brcm,bcm6368.dtsi
create mode 100644 include/configs/bmips_bcm6368.h
create mode 100644 include/dt-bindings/clock/bcm6368-clock.h
create mode 100644 include/dt-bindings/reset/bcm6368-reset.h
diff --git a/arch/mips/dts/brcm,bcm6368.dtsi b/arch/mips/dts/brcm,bcm6368.dtsi
new file mode 100644
index 0000000000..1bb538a1f3
--- /dev/null
+++ b/arch/mips/dts/brcm,bcm6368.dtsi
@@ -0,0 +1,168 @@
+/*
+ * Copyright (C) 2017 Álvaro Fernández Rojas <noltari@gmail.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <dt-bindings/clock/bcm6368-clock.h>
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/reset/bcm6368-reset.h>
+#include "skeleton.dtsi"
+
+/ {
+ compatible = "brcm,bcm6368";
+
+ aliases {
+ spi0 = &spi;
+ };
+
+ cpus {
+ reg = <0x10000000 0x4>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ u-boot,dm-pre-reloc;
+
+ cpu at 0 {
+ compatible = "brcm,bcm6368-cpu", "mips,mips4Kc";
+ device_type = "cpu";
+ reg = <0>;
+ u-boot,dm-pre-reloc;
+ };
+
+ cpu at 1 {
+ compatible = "brcm,bcm6368-cpu", "mips,mips4Kc";
+ device_type = "cpu";
+ reg = <1>;
+ u-boot,dm-pre-reloc;
+ };
+ };
+
+ clocks {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ u-boot,dm-pre-reloc;
+
+ periph_osc: periph-osc {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <50000000>;
+ u-boot,dm-pre-reloc;
+ };
+
+ periph_clk: periph-clk {
+ compatible = "brcm,bcm6345-clk";
+ reg = <0x10000004 0x4>;
+ #clock-cells = <1>;
+ };
+ };
+
+ pflash: nor at 18000000 {
+ compatible = "cfi-flash";
+ reg = <0x18000000 0x2000000>;
+ bank-width = <2>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ status = "disabled";
+ };
+
+ ubus {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ u-boot,dm-pre-reloc;
+
+ pll_cntl: syscon at 10000008 {
+ compatible = "syscon";
+ reg = <0x10000008 0x4>;
+ };
+
+ syscon-reboot {
+ compatible = "syscon-reboot";
+ regmap = <&pll_cntl>;
+ offset = <0x0>;
+ mask = <0x1>;
+ };
+
+ periph_rst: reset-controller at 10000010 {
+ compatible = "brcm,bcm6345-reset";
+ reg = <0x10000010 0x4>;
+ #reset-cells = <1>;
+ };
+
+ wdt: watchdog at 1000005c {
+ compatible = "brcm,bcm6345-wdt";
+ reg = <0x1000005c 0xc>;
+ clocks = <&periph_osc>;
+ };
+
+ wdt-reboot {
+ compatible = "wdt-reboot";
+ wdt = <&wdt>;
+ };
+
+ gpio1: gpio-controller at 10000080 {
+ compatible = "brcm,bcm6345-gpio";
+ reg = <0x10000080 0x4>, <0x10000088 0x4>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ ngpios = <6>;
+
+ status = "disabled";
+ };
+
+ gpio0: gpio-controller at 10000084 {
+ compatible = "brcm,bcm6345-gpio";
+ reg = <0x10000084 0x4>, <0x1000008c 0x4>;
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ status = "disabled";
+ };
+
+ leds: led-controller at 100000d0 {
+ compatible = "brcm,bcm6358-leds";
+ reg = <0x100000d0 0x8>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ status = "disabled";
+ };
+
+ uart0: serial at 10000100 {
+ compatible = "brcm,bcm6345-uart";
+ reg = <0x10000100 0x18>;
+ clocks = <&periph_osc>;
+
+ status = "disabled";
+ };
+
+ uart1: serial at 10000120 {
+ compatible = "brcm,bcm6345-uart";
+ reg = <0x10000120 0x18>;
+ clocks = <&periph_osc>;
+
+ status = "disabled";
+ };
+
+ spi: spi at 10000800 {
+ compatible = "brcm,bcm6358-spi";
+ reg = <0x10000800 0x70c>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&periph_clk BCM6368_CLK_SPI>;
+ resets = <&periph_rst BCM6368_RST_SPI>;
+ spi-max-frequency = <20000000>;
+ num-cs = <6>;
+
+ status = "disabled";
+ };
+
+ memory-controller at 10001200 {
+ compatible = "brcm,bcm6358-mc";
+ reg = <0x10001200 0x4c>;
+ u-boot,dm-pre-reloc;
+ };
+ };
+};
diff --git a/arch/mips/mach-bmips/Kconfig b/arch/mips/mach-bmips/Kconfig
index db8b40523a..936b67f5f2 100644
--- a/arch/mips/mach-bmips/Kconfig
+++ b/arch/mips/mach-bmips/Kconfig
@@ -10,6 +10,7 @@ config SYS_SOC
default "bcm6338" if SOC_BMIPS_BCM6338
default "bcm6348" if SOC_BMIPS_BCM6348
default "bcm6358" if SOC_BMIPS_BCM6358
+ default "bcm6368" if SOC_BMIPS_BCM6368
default "bcm63268" if SOC_BMIPS_BCM63268
choice
@@ -70,6 +71,17 @@ config SOC_BMIPS_BCM6358
help
This supports BMIPS BCM6358 family including BCM6358 and BCM6359.
+config SOC_BMIPS_BCM6368
+ bool "BMIPS BCM6368 family"
+ select SUPPORTS_BIG_ENDIAN
+ select SUPPORTS_CPU_MIPS32_R1
+ select MIPS_TUNE_4KC
+ select MIPS_L1_CACHE_SHIFT_4
+ select SWAP_IO_SPACE
+ select SYSRESET_SYSCON
+ help
+ This supports BMIPS BCM6368 family including BCM6368 and BCM6369.
+
config SOC_BMIPS_BCM63268
bool "BMIPS BCM63268 family"
select SUPPORTS_BIG_ENDIAN
@@ -120,6 +132,17 @@ config BOARD_COMTREND_VR3032U
ethernet ports, 1 USB port, 1 UART, GPIO buttons and LEDs,
and a BCM6362 (integrated).
+config BOARD_COMTREND_WAP5813N
+ bool "Comtrend WAP-5813n board"
+ depends on SOC_BMIPS_BCM6368
+ select BMIPS_SUPPORTS_BOOT_RAM
+ help
+ Comtrend WAP-5813n boards have a BCM6369 SoC with 64 MB of RAM and
+ 8 MB of flash (CFI).
+ Between its different peripherals there's a BCM53115 switch with 5
+ ethernet ports, 1 USB port, 1 UART, GPIO buttons and LEDs,
+ and a BCM4322 (miniPCI).
+
config BOARD_HUAWEI_HG556A
bool "Huawei EchoLife HG556a"
depends on SOC_BMIPS_BCM6358
@@ -185,6 +208,7 @@ config BMIPS_SUPPORTS_BOOT_RAM
source "board/comtrend/ar5387un/Kconfig"
source "board/comtrend/ct5361/Kconfig"
source "board/comtrend/vr3032u/Kconfig"
+source "board/comtrend/wap5813n/Kconfig"
source "board/huawei/hg556a/Kconfig"
source "board/netgear/cg3100d/Kconfig"
source "board/sagem/f at st1704/Kconfig"
diff --git a/include/configs/bmips_bcm6368.h b/include/configs/bmips_bcm6368.h
new file mode 100644
index 0000000000..ce35fae6a0
--- /dev/null
+++ b/include/configs/bmips_bcm6368.h
@@ -0,0 +1,30 @@
+/*
+ * Copyright (C) 2017 Álvaro Fernández Rojas <noltari@gmail.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef __CONFIG_BMIPS_BCM6368_H
+#define __CONFIG_BMIPS_BCM6368_H
+
+/* CPU */
+#define CONFIG_SYS_MIPS_TIMER_FREQ 200000000
+
+/* RAM */
+#define CONFIG_NR_DRAM_BANKS 1
+#define CONFIG_SYS_SDRAM_BASE 0x80000000
+
+/* U-Boot */
+#define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_SDRAM_BASE + 0x100000
+
+#if defined(CONFIG_BMIPS_BOOT_RAM)
+#define CONFIG_SKIP_LOWLEVEL_INIT
+#define CONFIG_SYS_INIT_SP_OFFSET 0x2000
+#endif
+
+#define CONFIG_SYS_FLASH_BASE 0xb8000000
+#define CONFIG_SYS_FLASH_EMPTY_INFO
+#define CONFIG_SYS_FLASH_PROTECTION
+#define CONFIG_SYS_MAX_FLASH_BANKS_DETECT 1
+
+#endif /* __CONFIG_BMIPS_BCM6368_H */
diff --git a/include/dt-bindings/clock/bcm6368-clock.h b/include/dt-bindings/clock/bcm6368-clock.h
new file mode 100644
index 0000000000..9d41c0f131
--- /dev/null
+++ b/include/dt-bindings/clock/bcm6368-clock.h
@@ -0,0 +1,31 @@
+/*
+ * Copyright (C) 2017 Álvaro Fernández Rojas <noltari@gmail.com>
+ *
+ * Derived from linux/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef __DT_BINDINGS_CLOCK_BCM6368_H
+#define __DT_BINDINGS_CLOCK_BCM6368_H
+
+#define BCM6368_CLK_VDSL_QPROC 2
+#define BCM6368_CLK_VDSL_AFE 3
+#define BCM6368_CLK_VDSL_BONDING 4
+#define BCM6368_CLK_VDSL 5
+#define BCM6368_CLK_PHYMIPS 6
+#define BCM6368_CLK_SWPKT_USB 7
+#define BCM6368_CLK_SWPKT_SAR 8
+#define BCM6368_CLK_SPI 9
+#define BCM6368_CLK_USBD 10
+#define BCM6368_CLK_SAR 11
+#define BCM6368_CLK_ROBOSW 12
+#define BCM6368_CLK_UTOPIA 13
+#define BCM6368_CLK_PCM 14
+#define BCM6368_CLK_USBH 15
+#define BCM6368_CLK_GLESS 16
+#define BCM6368_CLK_NAND 17
+#define BCM6368_CLK_IPSEC 18
+#define BCM6368_CLK_USBH_IDDQ 19
+
+#endif /* __DT_BINDINGS_CLOCK_BCM6368_H */
diff --git a/include/dt-bindings/reset/bcm6368-reset.h b/include/dt-bindings/reset/bcm6368-reset.h
new file mode 100644
index 0000000000..afa6a81d4c
--- /dev/null
+++ b/include/dt-bindings/reset/bcm6368-reset.h
@@ -0,0 +1,22 @@
+/*
+ * Copyright (C) 2017 Álvaro Fernández Rojas <noltari@gmail.com>
+ *
+ * Derived from linux/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef __DT_BINDINGS_RESET_BCM6368_H
+#define __DT_BINDINGS_RESET_BCM6368_H
+
+#define BCM6368_RST_SPI 0
+#define BCM6368_RST_MPI 3
+#define BCM6368_RST_IPSEC 4
+#define BCM6368_RST_EPHY 6
+#define BCM6368_RST_SAR 7
+#define BCM6368_RST_SWITCH 10
+#define BCM6368_RST_USBD 11
+#define BCM6368_RST_USBH 12
+#define BCM6368_RST_PCM 13
+
+#endif /* __DT_BINDINGS_RESET_BCM6368_H */
--
2.11.0
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [U-Boot] [PATCH 3/3] MIPS: add BMIPS Comtrend WAP-5813n board
2018-01-20 10:53 [U-Boot] [PATCH 0/3] mips: bmips: add BCM6368 SoC support Álvaro Fernández Rojas
2018-01-20 10:53 ` [U-Boot] [PATCH 1/3] dm: cpu: bmips: add BCM6368 support Álvaro Fernández Rojas
2018-01-20 10:53 ` [U-Boot] [PATCH 2/3] MIPS: add support for Broadcom MIPS BCM6368 SoC family Álvaro Fernández Rojas
@ 2018-01-20 10:53 ` Álvaro Fernández Rojas
2018-01-20 13:16 ` [U-Boot] [PATCH v2 0/3] mips: bmips: add BCM6368 SoC support Álvaro Fernández Rojas
2018-01-26 12:18 ` [U-Boot] [PATCH 0/3] mips: bmips: add BCM6368 SoC support Daniel Schwierzeck
4 siblings, 0 replies; 12+ messages in thread
From: Álvaro Fernández Rojas @ 2018-01-20 10:53 UTC (permalink / raw)
To: u-boot
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
---
arch/mips/dts/comtrend,wap-5813n.dts | 65 +++++++++++++++++++++++++++++++++
board/comtrend/wap5813n/Kconfig | 12 ++++++
board/comtrend/wap5813n/MAINTAINERS | 6 +++
board/comtrend/wap5813n/Makefile | 5 +++
board/comtrend/wap5813n/wap-5813n.c | 7 ++++
configs/comtrend_wap5813n_ram_defconfig | 45 +++++++++++++++++++++++
include/configs/comtrend_wap5813n.h | 19 ++++++++++
7 files changed, 159 insertions(+)
create mode 100644 arch/mips/dts/comtrend,wap-5813n.dts
create mode 100644 board/comtrend/wap5813n/Kconfig
create mode 100644 board/comtrend/wap5813n/MAINTAINERS
create mode 100644 board/comtrend/wap5813n/Makefile
create mode 100644 board/comtrend/wap5813n/wap-5813n.c
create mode 100644 configs/comtrend_wap5813n_ram_defconfig
create mode 100644 include/configs/comtrend_wap5813n.h
diff --git a/arch/mips/dts/comtrend,wap-5813n.dts b/arch/mips/dts/comtrend,wap-5813n.dts
new file mode 100644
index 0000000000..29386e2662
--- /dev/null
+++ b/arch/mips/dts/comtrend,wap-5813n.dts
@@ -0,0 +1,65 @@
+/*
+ * Copyright (C) 2017 Álvaro Fernández Rojas <noltari@gmail.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+/dts-v1/;
+
+#include "brcm,bcm6368.dtsi"
+
+/ {
+ model = "Comtrend WAP-5813n";
+ compatible = "comtrend,wap-5813n", "brcm,bcm6368";
+
+ aliases {
+ serial0 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ gpio-leds {
+ compatible = "gpio-leds";
+
+ inet_green {
+ label = "WAP-5813n:green:inet";
+ gpios = <&gpio0 5 GPIO_ACTIVE_HIGH>;
+ };
+
+ power_green {
+ label = "WAP-5813n:green:power";
+ gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>;
+ default-state = "on";
+ };
+
+ wps_green {
+ label = "WAP-5813n:green:wps";
+ gpios = <&gpio0 23 GPIO_ACTIVE_LOW>;
+ };
+
+ power_red {
+ label = "WAP-5813n:red:power";
+ gpios = <&gpio0 24 GPIO_ACTIVE_HIGH>;
+ };
+
+ inet_red {
+ label = "WAP-5813n:red:inet";
+ gpios = <&gpio0 31 GPIO_ACTIVE_HIGH>;
+ };
+ };
+};
+
+&gpio0 {
+ status = "okay";
+};
+
+&pflash {
+ status = "okay";
+};
+
+&uart0 {
+ u-boot,dm-pre-reloc;
+ status = "okay";
+};
diff --git a/board/comtrend/wap5813n/Kconfig b/board/comtrend/wap5813n/Kconfig
new file mode 100644
index 0000000000..2f2a14faae
--- /dev/null
+++ b/board/comtrend/wap5813n/Kconfig
@@ -0,0 +1,12 @@
+if BOARD_COMTREND_WAP5813N
+
+config SYS_BOARD
+ default "wap5813n"
+
+config SYS_VENDOR
+ default "comtrend"
+
+config SYS_CONFIG_NAME
+ default "comtrend_wap5813n"
+
+endif
diff --git a/board/comtrend/wap5813n/MAINTAINERS b/board/comtrend/wap5813n/MAINTAINERS
new file mode 100644
index 0000000000..f4d99796b4
--- /dev/null
+++ b/board/comtrend/wap5813n/MAINTAINERS
@@ -0,0 +1,6 @@
+COMTREND WAP-5813N BOARD
+M: Álvaro Fernández Rojas <noltari@gmail.com>
+S: Maintained
+F: board/comtrend/wap-5813n/
+F: include/configs/comtrend_wap-5813n.h
+F: configs/comtrend_wap5813n_ram_defconfig
diff --git a/board/comtrend/wap5813n/Makefile b/board/comtrend/wap5813n/Makefile
new file mode 100644
index 0000000000..fd7799305d
--- /dev/null
+++ b/board/comtrend/wap5813n/Makefile
@@ -0,0 +1,5 @@
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y += wap-5813n.o
diff --git a/board/comtrend/wap5813n/wap-5813n.c b/board/comtrend/wap5813n/wap-5813n.c
new file mode 100644
index 0000000000..d181ca68a0
--- /dev/null
+++ b/board/comtrend/wap5813n/wap-5813n.c
@@ -0,0 +1,7 @@
+/*
+ * Copyright (C) 2017 Álvaro Fernández Rojas <noltari@gmail.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
diff --git a/configs/comtrend_wap5813n_ram_defconfig b/configs/comtrend_wap5813n_ram_defconfig
new file mode 100644
index 0000000000..5d5c584370
--- /dev/null
+++ b/configs/comtrend_wap5813n_ram_defconfig
@@ -0,0 +1,45 @@
+CONFIG_MIPS=y
+CONFIG_SYS_TEXT_BASE=0x80010000
+CONFIG_ARCH_BMIPS=y
+CONFIG_SOC_BMIPS_BCM6368=y
+# CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set
+# CONFIG_MIPS_BOOT_ENV_LEGACY is not set
+CONFIG_MIPS_BOOT_FDT=y
+CONFIG_DEFAULT_DEVICE_TREE="comtrend,wap-5813n"
+CONFIG_SPL_SYS_MALLOC_F_LEN=0x400
+CONFIG_TPL_SYS_MALLOC_F_LEN=0x400
+# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+CONFIG_OF_STDOUT_VIA_ALIAS=y
+CONFIG_DISPLAY_CPUINFO=y
+CONFIG_HUSH_PARSER=y
+CONFIG_SYS_PROMPT="WAP-5813n # "
+CONFIG_CMD_CPU=y
+CONFIG_CMD_LICENSE=y
+# CONFIG_CMD_BOOTD is not set
+# CONFIG_CMD_ELF is not set
+# CONFIG_CMD_XIMG is not set
+# CONFIG_CMD_EXPORTENV is not set
+# CONFIG_CMD_IMPORTENV is not set
+# CONFIG_CMD_EDITENV is not set
+# CONFIG_CMD_SAVEENV is not set
+# CONFIG_CMD_ENV_EXISTS is not set
+# CONFIG_CMD_CRC32 is not set
+CONFIG_CMD_MEMINFO=y
+# CONFIG_CMD_FPGA is not set
+# CONFIG_CMD_LOADS is not set
+# CONFIG_CMD_NET is not set
+# CONFIG_CMD_NFS is not set
+# CONFIG_CMD_MISC is not set
+# CONFIG_DM_DEVICE_REMOVE is not set
+CONFIG_DM_GPIO=y
+CONFIG_BCM6345_GPIO=y
+CONFIG_LED=y
+CONFIG_LED_GPIO=y
+CONFIG_MTD=y
+CONFIG_MTD_NOR_FLASH=y
+CONFIG_CFI_FLASH=y
+CONFIG_DM_RESET=y
+CONFIG_RESET_BCM6345=y
+# CONFIG_SPL_SERIAL_PRESENT is not set
+CONFIG_DM_SERIAL=y
+CONFIG_BCM6345_SERIAL=y
diff --git a/include/configs/comtrend_wap5813n.h b/include/configs/comtrend_wap5813n.h
new file mode 100644
index 0000000000..2eafb816c9
--- /dev/null
+++ b/include/configs/comtrend_wap5813n.h
@@ -0,0 +1,19 @@
+/*
+ * Copyright (C) 2017 Álvaro Fernández Rojas <noltari@gmail.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <configs/bmips_common.h>
+#include <configs/bmips_bcm6368.h>
+
+#define CONFIG_REMAKE_ELF
+
+#define CONFIG_ENV_SIZE (8 * 1024)
+
+#define CONFIG_AUTO_COMPLETE
+#define CONFIG_CMDLINE_EDITING
+#define CONFIG_SYS_LONGHELP
+
+#define CONFIG_SYS_FLASH_CFI 1
+#define CONFIG_FLASH_CFI_DRIVER 1
--
2.11.0
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [U-Boot] [PATCH v2 0/3] mips: bmips: add BCM6368 SoC support
2018-01-20 10:53 [U-Boot] [PATCH 0/3] mips: bmips: add BCM6368 SoC support Álvaro Fernández Rojas
` (2 preceding siblings ...)
2018-01-20 10:53 ` [U-Boot] [PATCH 3/3] MIPS: add BMIPS Comtrend WAP-5813n board Álvaro Fernández Rojas
@ 2018-01-20 13:16 ` Álvaro Fernández Rojas
2018-01-20 13:16 ` [U-Boot] [PATCH v2 1/3] dm: cpu: bmips: add BCM6368 support Álvaro Fernández Rojas
` (2 more replies)
2018-01-26 12:18 ` [U-Boot] [PATCH 0/3] mips: bmips: add BCM6368 SoC support Daniel Schwierzeck
4 siblings, 3 replies; 12+ messages in thread
From: Álvaro Fernández Rojas @ 2018-01-20 13:16 UTC (permalink / raw)
To: u-boot
BCM6368 is a dual core BCM63xx SoC.
v2: Remove board Kconfig on patch 2 and clean defconfig
Álvaro Fernández Rojas (3):
dm: cpu: bmips: add BCM6368 support
MIPS: add support for Broadcom MIPS BCM6368 SoC family
MIPS: add BMIPS Comtrend WAP-5813n board
arch/mips/dts/Makefile | 1 +
arch/mips/dts/brcm,bcm6368.dtsi | 168 ++++++++++++++++++++++++++++++
arch/mips/dts/comtrend,wap-5813n.dts | 65 ++++++++++++
arch/mips/mach-bmips/Kconfig | 24 +++++
board/comtrend/wap5813n/Kconfig | 12 +++
board/comtrend/wap5813n/MAINTAINERS | 6 ++
board/comtrend/wap5813n/Makefile | 5 +
board/comtrend/wap5813n/wap-5813n.c | 7 ++
configs/comtrend_wap5813n_ram_defconfig | 43 ++++++++
drivers/cpu/bmips_cpu.c | 36 +++++++
include/configs/bmips_bcm6368.h | 30 ++++++
include/configs/comtrend_wap5813n.h | 19 ++++
include/dt-bindings/clock/bcm6368-clock.h | 31 ++++++
include/dt-bindings/reset/bcm6368-reset.h | 22 ++++
14 files changed, 469 insertions(+)
create mode 100644 arch/mips/dts/brcm,bcm6368.dtsi
create mode 100644 arch/mips/dts/comtrend,wap-5813n.dts
create mode 100644 board/comtrend/wap5813n/Kconfig
create mode 100644 board/comtrend/wap5813n/MAINTAINERS
create mode 100644 board/comtrend/wap5813n/Makefile
create mode 100644 board/comtrend/wap5813n/wap-5813n.c
create mode 100644 configs/comtrend_wap5813n_ram_defconfig
create mode 100644 include/configs/bmips_bcm6368.h
create mode 100644 include/configs/comtrend_wap5813n.h
create mode 100644 include/dt-bindings/clock/bcm6368-clock.h
create mode 100644 include/dt-bindings/reset/bcm6368-reset.h
--
2.11.0
^ permalink raw reply [flat|nested] 12+ messages in thread
* [U-Boot] [PATCH v2 1/3] dm: cpu: bmips: add BCM6368 support
2018-01-20 13:16 ` [U-Boot] [PATCH v2 0/3] mips: bmips: add BCM6368 SoC support Álvaro Fernández Rojas
@ 2018-01-20 13:16 ` Álvaro Fernández Rojas
2018-01-21 16:46 ` Daniel Schwierzeck
2018-01-20 13:16 ` [U-Boot] [PATCH v2 2/3] MIPS: add support for Broadcom MIPS BCM6368 SoC family Álvaro Fernández Rojas
2018-01-20 13:16 ` [U-Boot] [PATCH v2 3/3] MIPS: add BMIPS Comtrend WAP-5813n board Álvaro Fernández Rojas
2 siblings, 1 reply; 12+ messages in thread
From: Álvaro Fernández Rojas @ 2018-01-20 13:16 UTC (permalink / raw)
To: u-boot
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
---
v2: no changes
drivers/cpu/bmips_cpu.c | 36 ++++++++++++++++++++++++++++++++++++
1 file changed, 36 insertions(+)
diff --git a/drivers/cpu/bmips_cpu.c b/drivers/cpu/bmips_cpu.c
index 1eb744adcd..2e3f1de74e 100644
--- a/drivers/cpu/bmips_cpu.c
+++ b/drivers/cpu/bmips_cpu.c
@@ -46,6 +46,17 @@ DECLARE_GLOBAL_DATA_PTR;
#define DMIPSPLLCFG_6358_N2_SHIFT 29
#define DMIPSPLLCFG_6358_N2_MASK (0x7 << DMIPSPLLCFG_6358_N2_SHIFT)
+#define REG_BCM6368_DDR_DMIPSPLLCFG 0x12a0
+#define DMIPSPLLCFG_6368_P1_SHIFT 0
+#define DMIPSPLLCFG_6368_P1_MASK (0xf << DMIPSPLLCFG_6368_P1_SHIFT)
+#define DMIPSPLLCFG_6368_P2_SHIFT 4
+#define DMIPSPLLCFG_6368_P2_MASK (0xf << DMIPSPLLCFG_6368_P2_SHIFT)
+#define DMIPSPLLCFG_6368_NDIV_SHIFT 16
+#define DMIPSPLLCFG_6368_NDIV_MASK (0x1ff << DMIPSPLLCFG_6368_NDIV_SHIFT)
+#define REG_BCM6368_DDR_DMIPSPLLDIV 0x12a4
+#define DMIPSPLLDIV_6368_MDIV_SHIFT 0
+#define DMIPSPLLDIV_6368_MDIV_MASK (0xff << DMIPSPLLDIV_6368_MDIV_SHIFT)
+
#define REG_BCM63268_MISC_STRAPBUS 0x1814
#define STRAPBUS_63268_FCVO_SHIFT 21
#define STRAPBUS_63268_FCVO_MASK (0xf << STRAPBUS_63268_FCVO_SHIFT)
@@ -157,6 +168,22 @@ static ulong bcm6358_get_cpu_freq(struct bmips_cpu_priv *priv)
return (16 * 1000000 * n1 * n2) / m1;
}
+static ulong bcm6368_get_cpu_freq(struct bmips_cpu_priv *priv)
+{
+ unsigned int tmp, p1, p2, ndiv, m1;
+
+ tmp = readl_be(priv->regs + REG_BCM6368_DDR_DMIPSPLLCFG);
+ p1 = (tmp & DMIPSPLLCFG_6368_P1_MASK) >> DMIPSPLLCFG_6368_P1_SHIFT;
+ p2 = (tmp & DMIPSPLLCFG_6368_P2_MASK) >> DMIPSPLLCFG_6368_P2_SHIFT;
+ ndiv = (tmp & DMIPSPLLCFG_6368_NDIV_MASK) >>
+ DMIPSPLLCFG_6368_NDIV_SHIFT;
+
+ tmp = readl_be(priv->regs + REG_BCM6368_DDR_DMIPSPLLDIV);
+ m1 = (tmp & DMIPSPLLDIV_6368_MDIV_MASK) >> DMIPSPLLDIV_6368_MDIV_SHIFT;
+
+ return (((64 * 1000000) / p1) * p2 * ndiv) / m1;
+}
+
static ulong bcm63268_get_cpu_freq(struct bmips_cpu_priv *priv)
{
unsigned int mips_pll_fcvo;
@@ -230,6 +257,12 @@ static const struct bmips_cpu_hw bmips_cpu_bcm6358 = {
.get_cpu_count = bcm6358_get_cpu_count,
};
+static const struct bmips_cpu_hw bmips_cpu_bcm6368 = {
+ .get_cpu_desc = bmips_short_cpu_desc,
+ .get_cpu_freq = bcm6368_get_cpu_freq,
+ .get_cpu_count = bcm6358_get_cpu_count,
+};
+
static const struct bmips_cpu_hw bmips_cpu_bcm63268 = {
.get_cpu_desc = bmips_long_cpu_desc,
.get_cpu_freq = bcm63268_get_cpu_freq,
@@ -327,6 +360,9 @@ static const struct udevice_id bmips_cpu_ids[] = {
.compatible = "brcm,bcm6358-cpu",
.data = (ulong)&bmips_cpu_bcm6358,
}, {
+ .compatible = "brcm,bcm6368-cpu",
+ .data = (ulong)&bmips_cpu_bcm6368,
+ }, {
.compatible = "brcm,bcm63268-cpu",
.data = (ulong)&bmips_cpu_bcm63268,
},
--
2.11.0
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [U-Boot] [PATCH v2 2/3] MIPS: add support for Broadcom MIPS BCM6368 SoC family
2018-01-20 13:16 ` [U-Boot] [PATCH v2 0/3] mips: bmips: add BCM6368 SoC support Álvaro Fernández Rojas
2018-01-20 13:16 ` [U-Boot] [PATCH v2 1/3] dm: cpu: bmips: add BCM6368 support Álvaro Fernández Rojas
@ 2018-01-20 13:16 ` Álvaro Fernández Rojas
2018-01-21 16:46 ` Daniel Schwierzeck
2018-01-20 13:16 ` [U-Boot] [PATCH v2 3/3] MIPS: add BMIPS Comtrend WAP-5813n board Álvaro Fernández Rojas
2 siblings, 1 reply; 12+ messages in thread
From: Álvaro Fernández Rojas @ 2018-01-20 13:16 UTC (permalink / raw)
To: u-boot
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
---
v2: Remove board Kconfig
arch/mips/dts/brcm,bcm6368.dtsi | 168 ++++++++++++++++++++++++++++++
arch/mips/mach-bmips/Kconfig | 12 +++
include/configs/bmips_bcm6368.h | 30 ++++++
include/dt-bindings/clock/bcm6368-clock.h | 31 ++++++
include/dt-bindings/reset/bcm6368-reset.h | 22 ++++
5 files changed, 263 insertions(+)
create mode 100644 arch/mips/dts/brcm,bcm6368.dtsi
create mode 100644 include/configs/bmips_bcm6368.h
create mode 100644 include/dt-bindings/clock/bcm6368-clock.h
create mode 100644 include/dt-bindings/reset/bcm6368-reset.h
diff --git a/arch/mips/dts/brcm,bcm6368.dtsi b/arch/mips/dts/brcm,bcm6368.dtsi
new file mode 100644
index 0000000000..1bb538a1f3
--- /dev/null
+++ b/arch/mips/dts/brcm,bcm6368.dtsi
@@ -0,0 +1,168 @@
+/*
+ * Copyright (C) 2017 Álvaro Fernández Rojas <noltari@gmail.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <dt-bindings/clock/bcm6368-clock.h>
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/reset/bcm6368-reset.h>
+#include "skeleton.dtsi"
+
+/ {
+ compatible = "brcm,bcm6368";
+
+ aliases {
+ spi0 = &spi;
+ };
+
+ cpus {
+ reg = <0x10000000 0x4>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ u-boot,dm-pre-reloc;
+
+ cpu at 0 {
+ compatible = "brcm,bcm6368-cpu", "mips,mips4Kc";
+ device_type = "cpu";
+ reg = <0>;
+ u-boot,dm-pre-reloc;
+ };
+
+ cpu at 1 {
+ compatible = "brcm,bcm6368-cpu", "mips,mips4Kc";
+ device_type = "cpu";
+ reg = <1>;
+ u-boot,dm-pre-reloc;
+ };
+ };
+
+ clocks {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ u-boot,dm-pre-reloc;
+
+ periph_osc: periph-osc {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <50000000>;
+ u-boot,dm-pre-reloc;
+ };
+
+ periph_clk: periph-clk {
+ compatible = "brcm,bcm6345-clk";
+ reg = <0x10000004 0x4>;
+ #clock-cells = <1>;
+ };
+ };
+
+ pflash: nor at 18000000 {
+ compatible = "cfi-flash";
+ reg = <0x18000000 0x2000000>;
+ bank-width = <2>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ status = "disabled";
+ };
+
+ ubus {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ u-boot,dm-pre-reloc;
+
+ pll_cntl: syscon at 10000008 {
+ compatible = "syscon";
+ reg = <0x10000008 0x4>;
+ };
+
+ syscon-reboot {
+ compatible = "syscon-reboot";
+ regmap = <&pll_cntl>;
+ offset = <0x0>;
+ mask = <0x1>;
+ };
+
+ periph_rst: reset-controller at 10000010 {
+ compatible = "brcm,bcm6345-reset";
+ reg = <0x10000010 0x4>;
+ #reset-cells = <1>;
+ };
+
+ wdt: watchdog at 1000005c {
+ compatible = "brcm,bcm6345-wdt";
+ reg = <0x1000005c 0xc>;
+ clocks = <&periph_osc>;
+ };
+
+ wdt-reboot {
+ compatible = "wdt-reboot";
+ wdt = <&wdt>;
+ };
+
+ gpio1: gpio-controller at 10000080 {
+ compatible = "brcm,bcm6345-gpio";
+ reg = <0x10000080 0x4>, <0x10000088 0x4>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ ngpios = <6>;
+
+ status = "disabled";
+ };
+
+ gpio0: gpio-controller at 10000084 {
+ compatible = "brcm,bcm6345-gpio";
+ reg = <0x10000084 0x4>, <0x1000008c 0x4>;
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ status = "disabled";
+ };
+
+ leds: led-controller at 100000d0 {
+ compatible = "brcm,bcm6358-leds";
+ reg = <0x100000d0 0x8>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ status = "disabled";
+ };
+
+ uart0: serial at 10000100 {
+ compatible = "brcm,bcm6345-uart";
+ reg = <0x10000100 0x18>;
+ clocks = <&periph_osc>;
+
+ status = "disabled";
+ };
+
+ uart1: serial at 10000120 {
+ compatible = "brcm,bcm6345-uart";
+ reg = <0x10000120 0x18>;
+ clocks = <&periph_osc>;
+
+ status = "disabled";
+ };
+
+ spi: spi at 10000800 {
+ compatible = "brcm,bcm6358-spi";
+ reg = <0x10000800 0x70c>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&periph_clk BCM6368_CLK_SPI>;
+ resets = <&periph_rst BCM6368_RST_SPI>;
+ spi-max-frequency = <20000000>;
+ num-cs = <6>;
+
+ status = "disabled";
+ };
+
+ memory-controller at 10001200 {
+ compatible = "brcm,bcm6358-mc";
+ reg = <0x10001200 0x4c>;
+ u-boot,dm-pre-reloc;
+ };
+ };
+};
diff --git a/arch/mips/mach-bmips/Kconfig b/arch/mips/mach-bmips/Kconfig
index db8b40523a..4438c62bae 100644
--- a/arch/mips/mach-bmips/Kconfig
+++ b/arch/mips/mach-bmips/Kconfig
@@ -10,6 +10,7 @@ config SYS_SOC
default "bcm6338" if SOC_BMIPS_BCM6338
default "bcm6348" if SOC_BMIPS_BCM6348
default "bcm6358" if SOC_BMIPS_BCM6358
+ default "bcm6368" if SOC_BMIPS_BCM6368
default "bcm63268" if SOC_BMIPS_BCM63268
choice
@@ -70,6 +71,17 @@ config SOC_BMIPS_BCM6358
help
This supports BMIPS BCM6358 family including BCM6358 and BCM6359.
+config SOC_BMIPS_BCM6368
+ bool "BMIPS BCM6368 family"
+ select SUPPORTS_BIG_ENDIAN
+ select SUPPORTS_CPU_MIPS32_R1
+ select MIPS_TUNE_4KC
+ select MIPS_L1_CACHE_SHIFT_4
+ select SWAP_IO_SPACE
+ select SYSRESET_SYSCON
+ help
+ This supports BMIPS BCM6368 family including BCM6368 and BCM6369.
+
config SOC_BMIPS_BCM63268
bool "BMIPS BCM63268 family"
select SUPPORTS_BIG_ENDIAN
diff --git a/include/configs/bmips_bcm6368.h b/include/configs/bmips_bcm6368.h
new file mode 100644
index 0000000000..ce35fae6a0
--- /dev/null
+++ b/include/configs/bmips_bcm6368.h
@@ -0,0 +1,30 @@
+/*
+ * Copyright (C) 2017 Álvaro Fernández Rojas <noltari@gmail.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef __CONFIG_BMIPS_BCM6368_H
+#define __CONFIG_BMIPS_BCM6368_H
+
+/* CPU */
+#define CONFIG_SYS_MIPS_TIMER_FREQ 200000000
+
+/* RAM */
+#define CONFIG_NR_DRAM_BANKS 1
+#define CONFIG_SYS_SDRAM_BASE 0x80000000
+
+/* U-Boot */
+#define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_SDRAM_BASE + 0x100000
+
+#if defined(CONFIG_BMIPS_BOOT_RAM)
+#define CONFIG_SKIP_LOWLEVEL_INIT
+#define CONFIG_SYS_INIT_SP_OFFSET 0x2000
+#endif
+
+#define CONFIG_SYS_FLASH_BASE 0xb8000000
+#define CONFIG_SYS_FLASH_EMPTY_INFO
+#define CONFIG_SYS_FLASH_PROTECTION
+#define CONFIG_SYS_MAX_FLASH_BANKS_DETECT 1
+
+#endif /* __CONFIG_BMIPS_BCM6368_H */
diff --git a/include/dt-bindings/clock/bcm6368-clock.h b/include/dt-bindings/clock/bcm6368-clock.h
new file mode 100644
index 0000000000..9d41c0f131
--- /dev/null
+++ b/include/dt-bindings/clock/bcm6368-clock.h
@@ -0,0 +1,31 @@
+/*
+ * Copyright (C) 2017 Álvaro Fernández Rojas <noltari@gmail.com>
+ *
+ * Derived from linux/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef __DT_BINDINGS_CLOCK_BCM6368_H
+#define __DT_BINDINGS_CLOCK_BCM6368_H
+
+#define BCM6368_CLK_VDSL_QPROC 2
+#define BCM6368_CLK_VDSL_AFE 3
+#define BCM6368_CLK_VDSL_BONDING 4
+#define BCM6368_CLK_VDSL 5
+#define BCM6368_CLK_PHYMIPS 6
+#define BCM6368_CLK_SWPKT_USB 7
+#define BCM6368_CLK_SWPKT_SAR 8
+#define BCM6368_CLK_SPI 9
+#define BCM6368_CLK_USBD 10
+#define BCM6368_CLK_SAR 11
+#define BCM6368_CLK_ROBOSW 12
+#define BCM6368_CLK_UTOPIA 13
+#define BCM6368_CLK_PCM 14
+#define BCM6368_CLK_USBH 15
+#define BCM6368_CLK_GLESS 16
+#define BCM6368_CLK_NAND 17
+#define BCM6368_CLK_IPSEC 18
+#define BCM6368_CLK_USBH_IDDQ 19
+
+#endif /* __DT_BINDINGS_CLOCK_BCM6368_H */
diff --git a/include/dt-bindings/reset/bcm6368-reset.h b/include/dt-bindings/reset/bcm6368-reset.h
new file mode 100644
index 0000000000..afa6a81d4c
--- /dev/null
+++ b/include/dt-bindings/reset/bcm6368-reset.h
@@ -0,0 +1,22 @@
+/*
+ * Copyright (C) 2017 Álvaro Fernández Rojas <noltari@gmail.com>
+ *
+ * Derived from linux/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef __DT_BINDINGS_RESET_BCM6368_H
+#define __DT_BINDINGS_RESET_BCM6368_H
+
+#define BCM6368_RST_SPI 0
+#define BCM6368_RST_MPI 3
+#define BCM6368_RST_IPSEC 4
+#define BCM6368_RST_EPHY 6
+#define BCM6368_RST_SAR 7
+#define BCM6368_RST_SWITCH 10
+#define BCM6368_RST_USBD 11
+#define BCM6368_RST_USBH 12
+#define BCM6368_RST_PCM 13
+
+#endif /* __DT_BINDINGS_RESET_BCM6368_H */
--
2.11.0
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [U-Boot] [PATCH v2 3/3] MIPS: add BMIPS Comtrend WAP-5813n board
2018-01-20 13:16 ` [U-Boot] [PATCH v2 0/3] mips: bmips: add BCM6368 SoC support Álvaro Fernández Rojas
2018-01-20 13:16 ` [U-Boot] [PATCH v2 1/3] dm: cpu: bmips: add BCM6368 support Álvaro Fernández Rojas
2018-01-20 13:16 ` [U-Boot] [PATCH v2 2/3] MIPS: add support for Broadcom MIPS BCM6368 SoC family Álvaro Fernández Rojas
@ 2018-01-20 13:16 ` Álvaro Fernández Rojas
2018-01-21 16:46 ` Daniel Schwierzeck
2 siblings, 1 reply; 12+ messages in thread
From: Álvaro Fernández Rojas @ 2018-01-20 13:16 UTC (permalink / raw)
To: u-boot
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
---
v2: Add board Kconfig and clean defconfig
arch/mips/dts/Makefile | 1 +
arch/mips/dts/comtrend,wap-5813n.dts | 65 +++++++++++++++++++++++++++++++++
arch/mips/mach-bmips/Kconfig | 12 ++++++
board/comtrend/wap5813n/Kconfig | 12 ++++++
board/comtrend/wap5813n/MAINTAINERS | 6 +++
board/comtrend/wap5813n/Makefile | 5 +++
board/comtrend/wap5813n/wap-5813n.c | 7 ++++
configs/comtrend_wap5813n_ram_defconfig | 43 ++++++++++++++++++++++
include/configs/comtrend_wap5813n.h | 19 ++++++++++
9 files changed, 170 insertions(+)
create mode 100644 arch/mips/dts/comtrend,wap-5813n.dts
create mode 100644 board/comtrend/wap5813n/Kconfig
create mode 100644 board/comtrend/wap5813n/MAINTAINERS
create mode 100644 board/comtrend/wap5813n/Makefile
create mode 100644 board/comtrend/wap5813n/wap-5813n.c
create mode 100644 configs/comtrend_wap5813n_ram_defconfig
create mode 100644 include/configs/comtrend_wap5813n.h
diff --git a/arch/mips/dts/Makefile b/arch/mips/dts/Makefile
index a190485ded..72848ed1b4 100644
--- a/arch/mips/dts/Makefile
+++ b/arch/mips/dts/Makefile
@@ -11,6 +11,7 @@ dtb-$(CONFIG_TARGET_XILFPGA) += nexys4ddr.dtb
dtb-$(CONFIG_BOARD_COMTREND_AR5387UN) += comtrend,ar-5387un.dtb
dtb-$(CONFIG_BOARD_COMTREND_CT5361) += comtrend,ct-5361.dtb
dtb-$(CONFIG_BOARD_COMTREND_VR3032U) += comtrend,vr-3032u.dtb
+dtb-$(CONFIG_BOARD_COMTREND_WAP5813N) += comtrend,wap-5813n.dtb
dtb-$(CONFIG_BOARD_HUAWEI_HG556A) += huawei,hg556a.dtb
dtb-$(CONFIG_BOARD_NETGEAR_CG3100D) += netgear,cg3100d.dtb
dtb-$(CONFIG_BOARD_SAGEM_FAST1704) += sagem,f at st1704.dtb
diff --git a/arch/mips/dts/comtrend,wap-5813n.dts b/arch/mips/dts/comtrend,wap-5813n.dts
new file mode 100644
index 0000000000..29386e2662
--- /dev/null
+++ b/arch/mips/dts/comtrend,wap-5813n.dts
@@ -0,0 +1,65 @@
+/*
+ * Copyright (C) 2017 Álvaro Fernández Rojas <noltari@gmail.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+/dts-v1/;
+
+#include "brcm,bcm6368.dtsi"
+
+/ {
+ model = "Comtrend WAP-5813n";
+ compatible = "comtrend,wap-5813n", "brcm,bcm6368";
+
+ aliases {
+ serial0 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ gpio-leds {
+ compatible = "gpio-leds";
+
+ inet_green {
+ label = "WAP-5813n:green:inet";
+ gpios = <&gpio0 5 GPIO_ACTIVE_HIGH>;
+ };
+
+ power_green {
+ label = "WAP-5813n:green:power";
+ gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>;
+ default-state = "on";
+ };
+
+ wps_green {
+ label = "WAP-5813n:green:wps";
+ gpios = <&gpio0 23 GPIO_ACTIVE_LOW>;
+ };
+
+ power_red {
+ label = "WAP-5813n:red:power";
+ gpios = <&gpio0 24 GPIO_ACTIVE_HIGH>;
+ };
+
+ inet_red {
+ label = "WAP-5813n:red:inet";
+ gpios = <&gpio0 31 GPIO_ACTIVE_HIGH>;
+ };
+ };
+};
+
+&gpio0 {
+ status = "okay";
+};
+
+&pflash {
+ status = "okay";
+};
+
+&uart0 {
+ u-boot,dm-pre-reloc;
+ status = "okay";
+};
diff --git a/arch/mips/mach-bmips/Kconfig b/arch/mips/mach-bmips/Kconfig
index 4438c62bae..936b67f5f2 100644
--- a/arch/mips/mach-bmips/Kconfig
+++ b/arch/mips/mach-bmips/Kconfig
@@ -132,6 +132,17 @@ config BOARD_COMTREND_VR3032U
ethernet ports, 1 USB port, 1 UART, GPIO buttons and LEDs,
and a BCM6362 (integrated).
+config BOARD_COMTREND_WAP5813N
+ bool "Comtrend WAP-5813n board"
+ depends on SOC_BMIPS_BCM6368
+ select BMIPS_SUPPORTS_BOOT_RAM
+ help
+ Comtrend WAP-5813n boards have a BCM6369 SoC with 64 MB of RAM and
+ 8 MB of flash (CFI).
+ Between its different peripherals there's a BCM53115 switch with 5
+ ethernet ports, 1 USB port, 1 UART, GPIO buttons and LEDs,
+ and a BCM4322 (miniPCI).
+
config BOARD_HUAWEI_HG556A
bool "Huawei EchoLife HG556a"
depends on SOC_BMIPS_BCM6358
@@ -197,6 +208,7 @@ config BMIPS_SUPPORTS_BOOT_RAM
source "board/comtrend/ar5387un/Kconfig"
source "board/comtrend/ct5361/Kconfig"
source "board/comtrend/vr3032u/Kconfig"
+source "board/comtrend/wap5813n/Kconfig"
source "board/huawei/hg556a/Kconfig"
source "board/netgear/cg3100d/Kconfig"
source "board/sagem/f at st1704/Kconfig"
diff --git a/board/comtrend/wap5813n/Kconfig b/board/comtrend/wap5813n/Kconfig
new file mode 100644
index 0000000000..2f2a14faae
--- /dev/null
+++ b/board/comtrend/wap5813n/Kconfig
@@ -0,0 +1,12 @@
+if BOARD_COMTREND_WAP5813N
+
+config SYS_BOARD
+ default "wap5813n"
+
+config SYS_VENDOR
+ default "comtrend"
+
+config SYS_CONFIG_NAME
+ default "comtrend_wap5813n"
+
+endif
diff --git a/board/comtrend/wap5813n/MAINTAINERS b/board/comtrend/wap5813n/MAINTAINERS
new file mode 100644
index 0000000000..f4d99796b4
--- /dev/null
+++ b/board/comtrend/wap5813n/MAINTAINERS
@@ -0,0 +1,6 @@
+COMTREND WAP-5813N BOARD
+M: Álvaro Fernández Rojas <noltari@gmail.com>
+S: Maintained
+F: board/comtrend/wap-5813n/
+F: include/configs/comtrend_wap-5813n.h
+F: configs/comtrend_wap5813n_ram_defconfig
diff --git a/board/comtrend/wap5813n/Makefile b/board/comtrend/wap5813n/Makefile
new file mode 100644
index 0000000000..fd7799305d
--- /dev/null
+++ b/board/comtrend/wap5813n/Makefile
@@ -0,0 +1,5 @@
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y += wap-5813n.o
diff --git a/board/comtrend/wap5813n/wap-5813n.c b/board/comtrend/wap5813n/wap-5813n.c
new file mode 100644
index 0000000000..d181ca68a0
--- /dev/null
+++ b/board/comtrend/wap5813n/wap-5813n.c
@@ -0,0 +1,7 @@
+/*
+ * Copyright (C) 2017 Álvaro Fernández Rojas <noltari@gmail.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
diff --git a/configs/comtrend_wap5813n_ram_defconfig b/configs/comtrend_wap5813n_ram_defconfig
new file mode 100644
index 0000000000..aba53cce05
--- /dev/null
+++ b/configs/comtrend_wap5813n_ram_defconfig
@@ -0,0 +1,43 @@
+CONFIG_MIPS=y
+CONFIG_SYS_TEXT_BASE=0x80010000
+CONFIG_ARCH_BMIPS=y
+CONFIG_SOC_BMIPS_BCM6368=y
+# CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set
+# CONFIG_MIPS_BOOT_ENV_LEGACY is not set
+CONFIG_MIPS_BOOT_FDT=y
+CONFIG_DEFAULT_DEVICE_TREE="comtrend,wap-5813n"
+# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+CONFIG_OF_STDOUT_VIA_ALIAS=y
+CONFIG_DISPLAY_CPUINFO=y
+CONFIG_HUSH_PARSER=y
+CONFIG_SYS_PROMPT="WAP-5813n # "
+CONFIG_CMD_CPU=y
+CONFIG_CMD_LICENSE=y
+# CONFIG_CMD_BOOTD is not set
+# CONFIG_CMD_ELF is not set
+# CONFIG_CMD_XIMG is not set
+# CONFIG_CMD_EXPORTENV is not set
+# CONFIG_CMD_IMPORTENV is not set
+# CONFIG_CMD_EDITENV is not set
+# CONFIG_CMD_SAVEENV is not set
+# CONFIG_CMD_ENV_EXISTS is not set
+# CONFIG_CMD_CRC32 is not set
+CONFIG_CMD_MEMINFO=y
+# CONFIG_CMD_FPGA is not set
+# CONFIG_CMD_LOADS is not set
+# CONFIG_CMD_NET is not set
+# CONFIG_CMD_NFS is not set
+# CONFIG_CMD_MISC is not set
+# CONFIG_DM_DEVICE_REMOVE is not set
+CONFIG_DM_GPIO=y
+CONFIG_BCM6345_GPIO=y
+CONFIG_LED=y
+CONFIG_LED_GPIO=y
+CONFIG_MTD=y
+CONFIG_MTD_NOR_FLASH=y
+CONFIG_CFI_FLASH=y
+CONFIG_DM_RESET=y
+CONFIG_RESET_BCM6345=y
+# CONFIG_SPL_SERIAL_PRESENT is not set
+CONFIG_DM_SERIAL=y
+CONFIG_BCM6345_SERIAL=y
diff --git a/include/configs/comtrend_wap5813n.h b/include/configs/comtrend_wap5813n.h
new file mode 100644
index 0000000000..2eafb816c9
--- /dev/null
+++ b/include/configs/comtrend_wap5813n.h
@@ -0,0 +1,19 @@
+/*
+ * Copyright (C) 2017 Álvaro Fernández Rojas <noltari@gmail.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <configs/bmips_common.h>
+#include <configs/bmips_bcm6368.h>
+
+#define CONFIG_REMAKE_ELF
+
+#define CONFIG_ENV_SIZE (8 * 1024)
+
+#define CONFIG_AUTO_COMPLETE
+#define CONFIG_CMDLINE_EDITING
+#define CONFIG_SYS_LONGHELP
+
+#define CONFIG_SYS_FLASH_CFI 1
+#define CONFIG_FLASH_CFI_DRIVER 1
--
2.11.0
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [U-Boot] [PATCH v2 1/3] dm: cpu: bmips: add BCM6368 support
2018-01-20 13:16 ` [U-Boot] [PATCH v2 1/3] dm: cpu: bmips: add BCM6368 support Álvaro Fernández Rojas
@ 2018-01-21 16:46 ` Daniel Schwierzeck
0 siblings, 0 replies; 12+ messages in thread
From: Daniel Schwierzeck @ 2018-01-21 16:46 UTC (permalink / raw)
To: u-boot
On 20.01.2018 14:16, Álvaro Fernández Rojas wrote:
> Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
> ---
> v2: no changes
>
> drivers/cpu/bmips_cpu.c | 36 ++++++++++++++++++++++++++++++++++++
> 1 file changed, 36 insertions(+)
>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
--
- Daniel
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^ permalink raw reply [flat|nested] 12+ messages in thread
* [U-Boot] [PATCH v2 2/3] MIPS: add support for Broadcom MIPS BCM6368 SoC family
2018-01-20 13:16 ` [U-Boot] [PATCH v2 2/3] MIPS: add support for Broadcom MIPS BCM6368 SoC family Álvaro Fernández Rojas
@ 2018-01-21 16:46 ` Daniel Schwierzeck
0 siblings, 0 replies; 12+ messages in thread
From: Daniel Schwierzeck @ 2018-01-21 16:46 UTC (permalink / raw)
To: u-boot
On 20.01.2018 14:16, Álvaro Fernández Rojas wrote:
> Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
> ---
> v2: Remove board Kconfig
>
> arch/mips/dts/brcm,bcm6368.dtsi | 168 ++++++++++++++++++++++++++++++
> arch/mips/mach-bmips/Kconfig | 12 +++
> include/configs/bmips_bcm6368.h | 30 ++++++
> include/dt-bindings/clock/bcm6368-clock.h | 31 ++++++
> include/dt-bindings/reset/bcm6368-reset.h | 22 ++++
> 5 files changed, 263 insertions(+)
> create mode 100644 arch/mips/dts/brcm,bcm6368.dtsi
> create mode 100644 include/configs/bmips_bcm6368.h
> create mode 100644 include/dt-bindings/clock/bcm6368-clock.h
> create mode 100644 include/dt-bindings/reset/bcm6368-reset.h
>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
--
- Daniel
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^ permalink raw reply [flat|nested] 12+ messages in thread
* [U-Boot] [PATCH v2 3/3] MIPS: add BMIPS Comtrend WAP-5813n board
2018-01-20 13:16 ` [U-Boot] [PATCH v2 3/3] MIPS: add BMIPS Comtrend WAP-5813n board Álvaro Fernández Rojas
@ 2018-01-21 16:46 ` Daniel Schwierzeck
0 siblings, 0 replies; 12+ messages in thread
From: Daniel Schwierzeck @ 2018-01-21 16:46 UTC (permalink / raw)
To: u-boot
On 20.01.2018 14:16, Álvaro Fernández Rojas wrote:
> Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
> ---
> v2: Add board Kconfig and clean defconfig
>
> arch/mips/dts/Makefile | 1 +
> arch/mips/dts/comtrend,wap-5813n.dts | 65 +++++++++++++++++++++++++++++++++
> arch/mips/mach-bmips/Kconfig | 12 ++++++
> board/comtrend/wap5813n/Kconfig | 12 ++++++
> board/comtrend/wap5813n/MAINTAINERS | 6 +++
> board/comtrend/wap5813n/Makefile | 5 +++
> board/comtrend/wap5813n/wap-5813n.c | 7 ++++
> configs/comtrend_wap5813n_ram_defconfig | 43 ++++++++++++++++++++++
> include/configs/comtrend_wap5813n.h | 19 ++++++++++
> 9 files changed, 170 insertions(+)
> create mode 100644 arch/mips/dts/comtrend,wap-5813n.dts
> create mode 100644 board/comtrend/wap5813n/Kconfig
> create mode 100644 board/comtrend/wap5813n/MAINTAINERS
> create mode 100644 board/comtrend/wap5813n/Makefile
> create mode 100644 board/comtrend/wap5813n/wap-5813n.c
> create mode 100644 configs/comtrend_wap5813n_ram_defconfig
> create mode 100644 include/configs/comtrend_wap5813n.h
>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
--
- Daniel
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^ permalink raw reply [flat|nested] 12+ messages in thread
* [U-Boot] [PATCH 0/3] mips: bmips: add BCM6368 SoC support
2018-01-20 10:53 [U-Boot] [PATCH 0/3] mips: bmips: add BCM6368 SoC support Álvaro Fernández Rojas
` (3 preceding siblings ...)
2018-01-20 13:16 ` [U-Boot] [PATCH v2 0/3] mips: bmips: add BCM6368 SoC support Álvaro Fernández Rojas
@ 2018-01-26 12:18 ` Daniel Schwierzeck
4 siblings, 0 replies; 12+ messages in thread
From: Daniel Schwierzeck @ 2018-01-26 12:18 UTC (permalink / raw)
To: u-boot
On 20.01.2018 11:53, Álvaro Fernández Rojas wrote:
> BCM6368 is a dual core BCM63xx SoC.
>
> Álvaro Fernández Rojas (3):
> dm: cpu: bmips: add BCM6368 support
> MIPS: add support for Broadcom MIPS BCM6368 SoC family
> MIPS: add BMIPS Comtrend WAP-5813n board
>
> arch/mips/dts/brcm,bcm6368.dtsi | 168 ++++++++++++++++++++++++++++++
> arch/mips/dts/comtrend,wap-5813n.dts | 65 ++++++++++++
> arch/mips/mach-bmips/Kconfig | 24 +++++
> board/comtrend/wap5813n/Kconfig | 12 +++
> board/comtrend/wap5813n/MAINTAINERS | 6 ++
> board/comtrend/wap5813n/Makefile | 5 +
> board/comtrend/wap5813n/wap-5813n.c | 7 ++
> configs/comtrend_wap5813n_ram_defconfig | 45 ++++++++
> drivers/cpu/bmips_cpu.c | 36 +++++++
> include/configs/bmips_bcm6368.h | 30 ++++++
> include/configs/comtrend_wap5813n.h | 19 ++++
> include/dt-bindings/clock/bcm6368-clock.h | 31 ++++++
> include/dt-bindings/reset/bcm6368-reset.h | 22 ++++
> 13 files changed, 470 insertions(+)
> create mode 100644 arch/mips/dts/brcm,bcm6368.dtsi
> create mode 100644 arch/mips/dts/comtrend,wap-5813n.dts
> create mode 100644 board/comtrend/wap5813n/Kconfig
> create mode 100644 board/comtrend/wap5813n/MAINTAINERS
> create mode 100644 board/comtrend/wap5813n/Makefile
> create mode 100644 board/comtrend/wap5813n/wap-5813n.c
> create mode 100644 configs/comtrend_wap5813n_ram_defconfig
> create mode 100644 include/configs/bmips_bcm6368.h
> create mode 100644 include/configs/comtrend_wap5813n.h
> create mode 100644 include/dt-bindings/clock/bcm6368-clock.h
> create mode 100644 include/dt-bindings/reset/bcm6368-reset.h
>
applied to u-boot-mips, thanks.
--
- Daniel
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end of thread, other threads:[~2018-01-26 12:18 UTC | newest]
Thread overview: 12+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2018-01-20 10:53 [U-Boot] [PATCH 0/3] mips: bmips: add BCM6368 SoC support Álvaro Fernández Rojas
2018-01-20 10:53 ` [U-Boot] [PATCH 1/3] dm: cpu: bmips: add BCM6368 support Álvaro Fernández Rojas
2018-01-20 10:53 ` [U-Boot] [PATCH 2/3] MIPS: add support for Broadcom MIPS BCM6368 SoC family Álvaro Fernández Rojas
2018-01-20 10:53 ` [U-Boot] [PATCH 3/3] MIPS: add BMIPS Comtrend WAP-5813n board Álvaro Fernández Rojas
2018-01-20 13:16 ` [U-Boot] [PATCH v2 0/3] mips: bmips: add BCM6368 SoC support Álvaro Fernández Rojas
2018-01-20 13:16 ` [U-Boot] [PATCH v2 1/3] dm: cpu: bmips: add BCM6368 support Álvaro Fernández Rojas
2018-01-21 16:46 ` Daniel Schwierzeck
2018-01-20 13:16 ` [U-Boot] [PATCH v2 2/3] MIPS: add support for Broadcom MIPS BCM6368 SoC family Álvaro Fernández Rojas
2018-01-21 16:46 ` Daniel Schwierzeck
2018-01-20 13:16 ` [U-Boot] [PATCH v2 3/3] MIPS: add BMIPS Comtrend WAP-5813n board Álvaro Fernández Rojas
2018-01-21 16:46 ` Daniel Schwierzeck
2018-01-26 12:18 ` [U-Boot] [PATCH 0/3] mips: bmips: add BCM6368 SoC support Daniel Schwierzeck
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