[U-Boot] [PATCH 0/4] mips: bmips: add BCM6318 SoC support

[U-Boot] [PATCH 0/4] mips: bmips: add BCM6318 SoC support

[Álvaro Fernández Rojas]

BCM6318 is a single core BCM63xx SoC.

Álvaro Fernández Rojas (4):
  dm: cpu: bmips: add BCM6318 support
  dm: ram: bmips: add BCM6318 support
  MIPS: add support for Broadcom MIPS BCM6318 SoC family
  MIPS: add BMIPS Comtrend AR-5315u board

 arch/mips/dts/Makefile                             |   1 +
 arch/mips/dts/brcm,bcm6318.dtsi                    | 156 +++++++++++++++++++++
 arch/mips/dts/comtrend,ar-5315u.dts                |  85 +++++++++++
 arch/mips/mach-bmips/Kconfig                       |  24 ++++
 board/comtrend/ar5315u/Kconfig                     |  12 ++
 board/comtrend/ar5315u/MAINTAINERS                 |   6 +
 board/comtrend/ar5315u/Makefile                    |   5 +
 board/comtrend/ar5315u/ar-5315u.c                  |   7 +
 configs/comtrend_ar5315u_ram_defconfig             |  51 +++++++
 drivers/cpu/bmips_cpu.c                            |  35 +++++
 drivers/ram/bmips_ram.c                            |  19 +++
 include/configs/bmips_bcm6318.h                    |  25 ++++
 include/configs/comtrend_ar5315u.h                 |  16 +++
 include/dt-bindings/clock/bcm6318-clock.h          |  37 +++++
 .../power-domain/bcm6318-power-domain.h            |  13 ++
 include/dt-bindings/reset/bcm6318-reset.h          |  26 ++++
 16 files changed, 518 insertions(+)
 create mode 100644 arch/mips/dts/brcm,bcm6318.dtsi
 create mode 100644 arch/mips/dts/comtrend,ar-5315u.dts
 create mode 100644 board/comtrend/ar5315u/Kconfig
 create mode 100644 board/comtrend/ar5315u/MAINTAINERS
 create mode 100644 board/comtrend/ar5315u/Makefile
 create mode 100644 board/comtrend/ar5315u/ar-5315u.c
 create mode 100644 configs/comtrend_ar5315u_ram_defconfig
 create mode 100644 include/configs/bmips_bcm6318.h
 create mode 100644 include/configs/comtrend_ar5315u.h
 create mode 100644 include/dt-bindings/clock/bcm6318-clock.h
 create mode 100644 include/dt-bindings/power-domain/bcm6318-power-domain.h
 create mode 100644 include/dt-bindings/reset/bcm6318-reset.h

-- 
2.11.0

[U-Boot] [PATCH 1/4] dm: cpu: bmips: add BCM6318 support

[Álvaro Fernández Rojas]

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
---
 drivers/cpu/bmips_cpu.c | 35 +++++++++++++++++++++++++++++++++++
 1 file changed, 35 insertions(+)

diff --git a/drivers/cpu/bmips_cpu.c b/drivers/cpu/bmips_cpu.c
index 2e3f1de74e..1fe5d106d0 100644
--- a/drivers/cpu/bmips_cpu.c
+++ b/drivers/cpu/bmips_cpu.c
@@ -26,6 +26,10 @@ DECLARE_GLOBAL_DATA_PTR;
 #define REG_BCM6328_OTP			0x62c
 #define BCM6328_TP1_DISABLED		BIT(9)
 
+#define REG_BCM6328_STRAP_OVRDBUS	0x900
+#define OVRDBUS_6318_FREQ_SHIFT		23
+#define OVRDBUS_6318_FREQ_MASK		(0x3 << OVRDBUS_6318_FREQ_SHIFT)
+
 #define REG_BCM6328_MISC_STRAPBUS	0x1a40
 #define STRAPBUS_6328_FCVO_SHIFT	7
 #define STRAPBUS_6328_FCVO_MASK		(0x1f << STRAPBUS_6328_FCVO_SHIFT)
@@ -112,6 +116,28 @@ static ulong bcm3380_get_cpu_freq(struct bmips_cpu_priv *priv)
 	return 333000000;
 }
 
+static ulong bcm6318_get_cpu_freq(struct bmips_cpu_priv *priv)
+{
+	unsigned int mips_pll_fcvo;
+
+	mips_pll_fcvo = readl_be(priv->regs + REG_BCM6328_STRAP_OVRDBUS);
+	mips_pll_fcvo = (mips_pll_fcvo & OVRDBUS_6318_FREQ_MASK)
+			>> OVRDBUS_6318_FREQ_SHIFT;
+
+	switch (mips_pll_fcvo) {
+	case 0:
+		return 166000000;
+	case 1:
+		return 400000000;
+	case 2:
+		return 250000000;
+	case 3:
+		return 333000000;
+	default:
+		return 0;
+	}
+}
+
 static ulong bcm6328_get_cpu_freq(struct bmips_cpu_priv *priv)
 {
 	unsigned int mips_pll_fcvo;
@@ -233,6 +259,12 @@ static const struct bmips_cpu_hw bmips_cpu_bcm3380 = {
 	.get_cpu_count = bcm6358_get_cpu_count,
 };
 
+static const struct bmips_cpu_hw bmips_cpu_bcm6318 = {
+	.get_cpu_desc = bmips_short_cpu_desc,
+	.get_cpu_freq = bcm6318_get_cpu_freq,
+	.get_cpu_count = bcm6345_get_cpu_count,
+};
+
 static const struct bmips_cpu_hw bmips_cpu_bcm6328 = {
 	.get_cpu_desc = bmips_long_cpu_desc,
 	.get_cpu_freq = bcm6328_get_cpu_freq,
@@ -348,6 +380,9 @@ static const struct udevice_id bmips_cpu_ids[] = {
 		.compatible = "brcm,bcm3380-cpu",
 		.data = (ulong)&bmips_cpu_bcm3380,
 	}, {
+		.compatible = "brcm,bcm6318-cpu",
+		.data = (ulong)&bmips_cpu_bcm6318,
+	}, {
 		.compatible = "brcm,bcm6328-cpu",
 		.data = (ulong)&bmips_cpu_bcm6328,
 	}, {
-- 
2.11.0

[U-Boot] [PATCH 2/4] dm: ram: bmips: add BCM6318 support

[Álvaro Fernández Rojas]

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
---
 drivers/ram/bmips_ram.c | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)

diff --git a/drivers/ram/bmips_ram.c b/drivers/ram/bmips_ram.c
index 3f9d9a8566..7a5dfac4ab 100644
--- a/drivers/ram/bmips_ram.c
+++ b/drivers/ram/bmips_ram.c
@@ -23,6 +23,8 @@
 #define SDRAM_CFG_32B_MASK	(1 << SDRAM_CFG_32B_SHIFT)
 #define SDRAM_CFG_BANK_SHIFT	13
 #define SDRAM_CFG_BANK_MASK	(1 << SDRAM_CFG_BANK_SHIFT)
+#define SDRAM_6318_SPACE_SHIFT	4
+#define SDRAM_6318_SPACE_MASK	(0xf << SDRAM_6318_SPACE_SHIFT)
 
 #define MEMC_CFG_REG		0x4
 #define MEMC_CFG_32B_SHIFT	1
@@ -45,6 +47,16 @@ struct bmips_ram_priv {
 	const struct bmips_ram_hw *hw;
 };
 
+static ulong bcm6318_get_ram_size(struct bmips_ram_priv *priv)
+{
+	u32 val;
+
+	val = readl_be(priv->regs + SDRAM_CFG_REG);
+	val = (val & SDRAM_6318_SPACE_MASK) >> SDRAM_6318_SPACE_SHIFT;
+
+	return (1 << (val + 20));
+}
+
 static ulong bcm6328_get_ram_size(struct bmips_ram_priv *priv)
 {
 	return readl_be(priv->regs + DDR_CSEND_REG) << 24;
@@ -102,6 +114,10 @@ static const struct ram_ops bmips_ram_ops = {
 	.get_info = bmips_ram_get_info,
 };
 
+static const struct bmips_ram_hw bmips_ram_bcm6318 = {
+	.get_ram_size = bcm6318_get_ram_size,
+};
+
 static const struct bmips_ram_hw bmips_ram_bcm6328 = {
 	.get_ram_size = bcm6328_get_ram_size,
 };
@@ -116,6 +132,9 @@ static const struct bmips_ram_hw bmips_ram_bcm6358 = {
 
 static const struct udevice_id bmips_ram_ids[] = {
 	{
+		.compatible = "brcm,bcm6318-mc",
+		.data = (ulong)&bmips_ram_bcm6318,
+	}, {
 		.compatible = "brcm,bcm6328-mc",
 		.data = (ulong)&bmips_ram_bcm6328,
 	}, {
-- 
2.11.0

[U-Boot] [PATCH 3/4] MIPS: add support for Broadcom MIPS BCM6318 SoC family

[Álvaro Fernández Rojas]

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
---
 arch/mips/dts/brcm,bcm6318.dtsi                    | 156 +++++++++++++++++++++
 arch/mips/mach-bmips/Kconfig                       |  12 ++
 include/configs/bmips_bcm6318.h                    |  25 ++++
 include/dt-bindings/clock/bcm6318-clock.h          |  37 +++++
 .../power-domain/bcm6318-power-domain.h            |  13 ++
 include/dt-bindings/reset/bcm6318-reset.h          |  26 ++++
 6 files changed, 269 insertions(+)
 create mode 100644 arch/mips/dts/brcm,bcm6318.dtsi
 create mode 100644 include/configs/bmips_bcm6318.h
 create mode 100644 include/dt-bindings/clock/bcm6318-clock.h
 create mode 100644 include/dt-bindings/power-domain/bcm6318-power-domain.h
 create mode 100644 include/dt-bindings/reset/bcm6318-reset.h

diff --git a/arch/mips/dts/brcm,bcm6318.dtsi b/arch/mips/dts/brcm,bcm6318.dtsi
new file mode 100644
index 0000000000..d501a9410a
--- /dev/null
+++ b/arch/mips/dts/brcm,bcm6318.dtsi
@@ -0,0 +1,156 @@
+/*
+ * Copyright (C) 2018 Álvaro Fernández Rojas <noltari@gmail.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <dt-bindings/clock/bcm6318-clock.h>
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/power-domain/bcm6318-power-domain.h>
+#include <dt-bindings/reset/bcm6318-reset.h>
+#include "skeleton.dtsi"
+
+/ {
+	compatible = "brcm,bcm6318";
+
+	aliases {
+		spi0 = &spi;
+	};
+
+	cpus {
+		reg = <0x10000000 0x4>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		u-boot,dm-pre-reloc;
+
+		cpu at 0 {
+			compatible = "brcm,bcm6318-cpu", "mips,mips4Kc";
+			device_type = "cpu";
+			reg = <0>;
+			u-boot,dm-pre-reloc;
+		};
+	};
+
+	clocks {
+		compatible = "simple-bus";
+		#address-cells = <1>;
+		#size-cells = <1>;
+		u-boot,dm-pre-reloc;
+
+		hsspi_pll: hsspi-pll {
+			compatible = "fixed-clock";
+			#clock-cells = <0>;
+			clock-frequency = <250000000>;
+		};
+
+		periph_osc: periph-osc {
+			compatible = "fixed-clock";
+			#clock-cells = <0>;
+			clock-frequency = <50000000>;
+			u-boot,dm-pre-reloc;
+		};
+
+		periph_clk: periph-clk {
+			compatible = "brcm,bcm6345-clk";
+			reg = <0x10000004 0x4>;
+			#clock-cells = <1>;
+		};
+	};
+
+	ubus {
+		compatible = "simple-bus";
+		#address-cells = <1>;
+		#size-cells = <1>;
+		u-boot,dm-pre-reloc;
+
+		periph_rst: reset-controller at 10000010 {
+			compatible = "brcm,bcm6345-reset";
+			reg = <0x10000010 0x4>;
+			#reset-cells = <1>;
+		};
+
+		wdt: watchdog at 10000068 {
+			compatible = "brcm,bcm6345-wdt";
+			reg = <0x10000068 0xc>;
+			clocks = <&periph_osc>;
+		};
+
+		wdt-reboot {
+			compatible = "wdt-reboot";
+			wdt = <&wdt>;
+		};
+
+		pll_cntl: syscon at 10000074 {
+			compatible = "syscon";
+			reg = <0x10000074 0x4>;
+		};
+
+		syscon-reboot {
+			compatible = "syscon-reboot";
+			regmap = <&pll_cntl>;
+			offset = <0x0>;
+			mask = <0x1>;
+		};
+
+		gpio1: gpio-controller at 10000080 {
+			compatible = "brcm,bcm6345-gpio";
+			reg = <0x10000080 0x4>, <0x10000088 0x4>;
+			gpio-controller;
+			#gpio-cells = <2>;
+
+			status = "disabled";
+		};
+
+		gpio0: gpio-controller at 10000084 {
+			compatible = "brcm,bcm6345-gpio";
+			reg = <0x10000084 0x4>, <0x1000008c 0x4>;
+			gpio-controller;
+			#gpio-cells = <2>;
+
+			status = "disabled";
+		};
+
+		uart0: serial at 10000100 {
+			compatible = "brcm,bcm6345-uart";
+			reg = <0x10000100 0x18>;
+			clocks = <&periph_osc>;
+
+			status = "disabled";
+		};
+
+		leds: led-controller at 10000200 {
+			compatible = "brcm,bcm6328-leds";
+			reg = <0x10000200 0x28>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			status = "disabled";
+		};
+
+		periph_pwr: power-controller at 100008e8 {
+			compatible = "brcm,bcm6328-power-domain";
+			reg = <0x100008e8 0x4>;
+			#power-domain-cells = <1>;
+		};
+
+		spi: spi at 10003000 {
+			compatible = "brcm,bcm6328-hsspi";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0x10003000 0x600>;
+			clocks = <&periph_clk BCM6318_CLK_HSSPI>, <&hsspi_pll>;
+			clock-names = "hsspi", "pll";
+			resets = <&periph_rst BCM6318_RST_SPI>;
+			spi-max-frequency = <33333334>;
+			num-cs = <3>;
+
+			status = "disabled";
+		};
+
+		memory-controller at 10004000 {
+			compatible = "brcm,bcm6318-mc";
+			reg = <0x10004000 0x38>;
+			u-boot,dm-pre-reloc;
+		};
+	};
+};
diff --git a/arch/mips/mach-bmips/Kconfig b/arch/mips/mach-bmips/Kconfig
index 936b67f5f2..c9b56f5ca7 100644
--- a/arch/mips/mach-bmips/Kconfig
+++ b/arch/mips/mach-bmips/Kconfig
@@ -6,6 +6,7 @@ config SYS_MALLOC_F_LEN
 
 config SYS_SOC
 	default "bcm3380" if SOC_BMIPS_BCM3380
+	default "bcm6318" if SOC_BMIPS_BCM6318
 	default "bcm6328" if SOC_BMIPS_BCM6328
 	default "bcm6338" if SOC_BMIPS_BCM6338
 	default "bcm6348" if SOC_BMIPS_BCM6348
@@ -27,6 +28,17 @@ config SOC_BMIPS_BCM3380
 	help
 	  This supports BMIPS BCM3380 family.
 
+config SOC_BMIPS_BCM6318
+	bool "BMIPS BCM6318 family"
+	select SUPPORTS_BIG_ENDIAN
+	select SUPPORTS_CPU_MIPS32_R1
+	select MIPS_TUNE_4KC
+	select MIPS_L1_CACHE_SHIFT_4
+	select SWAP_IO_SPACE
+	select SYSRESET_SYSCON
+	help
+	  This supports BMIPS BCM6318 family.
+
 config SOC_BMIPS_BCM6328
 	bool "BMIPS BCM6328 family"
 	select SUPPORTS_BIG_ENDIAN
diff --git a/include/configs/bmips_bcm6318.h b/include/configs/bmips_bcm6318.h
new file mode 100644
index 0000000000..454a7b7f7b
--- /dev/null
+++ b/include/configs/bmips_bcm6318.h
@@ -0,0 +1,25 @@
+/*
+ * Copyright (C) 2018 Álvaro Fernández Rojas <noltari@gmail.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __CONFIG_BMIPS_BCM6318_H
+#define __CONFIG_BMIPS_BCM6318_H
+
+/* CPU */
+#define CONFIG_SYS_MIPS_TIMER_FREQ	166500000
+
+/* RAM */
+#define CONFIG_NR_DRAM_BANKS		1
+#define CONFIG_SYS_SDRAM_BASE		0x80000000
+
+/* U-Boot */
+#define CONFIG_SYS_LOAD_ADDR		CONFIG_SYS_SDRAM_BASE + 0x100000
+
+#if defined(CONFIG_BMIPS_BOOT_RAM)
+#define CONFIG_SKIP_LOWLEVEL_INIT
+#define CONFIG_SYS_INIT_SP_OFFSET	0x2000
+#endif
+
+#endif /* __CONFIG_BMIPS_BCM6318_H */
diff --git a/include/dt-bindings/clock/bcm6318-clock.h b/include/dt-bindings/clock/bcm6318-clock.h
new file mode 100644
index 0000000000..1e3dc16f90
--- /dev/null
+++ b/include/dt-bindings/clock/bcm6318-clock.h
@@ -0,0 +1,37 @@
+/*
+ * Copyright (C) 2018 Álvaro Fernández Rojas <noltari@gmail.com>
+ *
+ * Derived from linux/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __DT_BINDINGS_CLOCK_BCM6318_H
+#define __DT_BINDINGS_CLOCK_BCM6318_H
+
+#define BCM6318_CLK_ADSL_ASB	0
+#define BCM6318_CLK_USB_ASB	1
+#define BCM6318_CLK_MIPS_ASB	2
+#define BCM6318_CLK_PCIE_ASB	3
+#define BCM6318_CLK_PHYMIPS_ASB	4
+#define BCM6318_CLK_ROBOSW_ASB	5
+#define BCM6318_CLK_SAR_ASB	6
+#define BCM6318_CLK_SDR_ASB	7
+#define BCM6318_CLK_SWREG_ASB	8
+#define BCM6318_CLK_PERIPH_ASB	9
+#define BCM6318_CLK_CPUBUS160	10
+#define BCM6318_CLK_ADSL	11
+#define BCM6318_CLK_SAR125	12
+#define BCM6318_CLK_MIPS	13
+#define BCM6318_CLK_PCIE	14
+#define BCM6318_CLK_ROBOSW250	16
+#define BCM6318_CLK_ROBOSW025	17
+#define BCM6318_CLK_SDR		19
+#define BCM6318_CLK_USB		20
+#define BCM6318_CLK_HSSPI	25
+#define BCM6318_CLK_PCIE25	27
+#define BCM6318_CLK_PHYMIPS	28
+#define BCM6318_CLK_AFE		29
+#define BCM6318_CLK_QPROC	30
+
+#endif /* __DT_BINDINGS_CLOCK_BCM6318_H */
diff --git a/include/dt-bindings/power-domain/bcm6318-power-domain.h b/include/dt-bindings/power-domain/bcm6318-power-domain.h
new file mode 100644
index 0000000000..38627d95c5
--- /dev/null
+++ b/include/dt-bindings/power-domain/bcm6318-power-domain.h
@@ -0,0 +1,13 @@
+/*
+ * Copyright (C) 2017 Álvaro Fernández Rojas <noltari@gmail.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __DT_BINDINGS_POWER_DOMAIN_BCM6318_H
+#define __DT_BINDINGS_POWER_DOMAIN_BCM6318_H
+
+#define BCM6318_PWR_PCIE	0
+#define BCM6318_PWR_USB		1
+
+#endif /* __DT_BINDINGS_POWER_DOMAIN_BCM6318_H */
diff --git a/include/dt-bindings/reset/bcm6318-reset.h b/include/dt-bindings/reset/bcm6318-reset.h
new file mode 100644
index 0000000000..781d7fbc4d
--- /dev/null
+++ b/include/dt-bindings/reset/bcm6318-reset.h
@@ -0,0 +1,26 @@
+/*
+ * Copyright (C) 2018 Álvaro Fernández Rojas <noltari@gmail.com>
+ *
+ * Derived from linux/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __DT_BINDINGS_RESET_BCM6318_H
+#define __DT_BINDINGS_RESET_BCM6318_H
+
+#define BCM6318_RST_SPI		0
+#define BCM6318_RST_EPHY	1
+#define BCM6318_RST_SAR		2
+#define BCM6318_RST_ENETSW	3
+#define BCM6318_RST_USBD	4
+#define BCM6318_RST_USBH	5
+#define BCM6318_RST_PCIE_CORE	6
+#define BCM6318_RST_PCIE	7
+#define BCM6318_RST_PCIE_EXT	8
+#define BCM6318_RST_PCIE_HARD	9
+#define BCM6318_RST_ADSL	10
+#define BCM6318_RST_PHYMIPS	11
+#define BCM6318_RST_HOSTMIPS	11
+
+#endif /* __DT_BINDINGS_RESET_BCM6318_H */
-- 
2.11.0

[U-Boot] [PATCH 4/4] MIPS: add BMIPS Comtrend AR-5315u board

[Álvaro Fernández Rojas]

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
---
 arch/mips/dts/Makefile                 |  1 +
 arch/mips/dts/comtrend,ar-5315u.dts    | 85 ++++++++++++++++++++++++++++++++++
 arch/mips/mach-bmips/Kconfig           | 12 +++++
 board/comtrend/ar5315u/Kconfig         | 12 +++++
 board/comtrend/ar5315u/MAINTAINERS     |  6 +++
 board/comtrend/ar5315u/Makefile        |  5 ++
 board/comtrend/ar5315u/ar-5315u.c      |  7 +++
 configs/comtrend_ar5315u_ram_defconfig | 51 ++++++++++++++++++++
 include/configs/comtrend_ar5315u.h     | 16 +++++++
 9 files changed, 195 insertions(+)
 create mode 100644 arch/mips/dts/comtrend,ar-5315u.dts
 create mode 100644 board/comtrend/ar5315u/Kconfig
 create mode 100644 board/comtrend/ar5315u/MAINTAINERS
 create mode 100644 board/comtrend/ar5315u/Makefile
 create mode 100644 board/comtrend/ar5315u/ar-5315u.c
 create mode 100644 configs/comtrend_ar5315u_ram_defconfig
 create mode 100644 include/configs/comtrend_ar5315u.h

diff --git a/arch/mips/dts/Makefile b/arch/mips/dts/Makefile
index 72848ed1b4..840dbf170d 100644
--- a/arch/mips/dts/Makefile
+++ b/arch/mips/dts/Makefile
@@ -8,6 +8,7 @@ dtb-$(CONFIG_TARGET_BOSTON) += img,boston.dtb
 dtb-$(CONFIG_TARGET_MALTA) += mti,malta.dtb
 dtb-$(CONFIG_TARGET_PIC32MZDASK) += pic32mzda_sk.dtb
 dtb-$(CONFIG_TARGET_XILFPGA) += nexys4ddr.dtb
+dtb-$(CONFIG_BOARD_COMTREND_AR5315U) += comtrend,ar-5315u.dtb
 dtb-$(CONFIG_BOARD_COMTREND_AR5387UN) += comtrend,ar-5387un.dtb
 dtb-$(CONFIG_BOARD_COMTREND_CT5361) += comtrend,ct-5361.dtb
 dtb-$(CONFIG_BOARD_COMTREND_VR3032U) += comtrend,vr-3032u.dtb
diff --git a/arch/mips/dts/comtrend,ar-5315u.dts b/arch/mips/dts/comtrend,ar-5315u.dts
new file mode 100644
index 0000000000..cdabd87731
--- /dev/null
+++ b/arch/mips/dts/comtrend,ar-5315u.dts
@@ -0,0 +1,85 @@
+/*
+ * Copyright (C) 2017 Álvaro Fernández Rojas <noltari@gmail.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+/dts-v1/;
+
+#include "brcm,bcm6318.dtsi"
+
+/ {
+	model = "Comtrend AR-5315u";
+	compatible = "comtrend,ar5315-un", "brcm,bcm6318";
+
+	aliases {
+		serial0 = &uart0;
+	};
+
+	chosen {
+		stdout-path = "serial0:115200n8";
+	};
+};
+
+&leds {
+	status = "okay";
+
+	led at 0 {
+		reg = <0>;
+		active-low;
+		label = "AR-5315u:green:wps";
+	};
+
+	led at 1 {
+		reg = <1>;
+		active-low;
+		label = "AR-5315u:green:power";
+	};
+
+	led at 2 {
+		reg = <2>;
+		active-low;
+		label = "AR-5315u:green:usb";
+	};
+
+	led at 8 {
+		reg = <8>;
+		active-low;
+		label = "AR-5315u:green:inet";
+	};
+
+	led at 9 {
+		reg = <9>;
+		active-low;
+		label = "AR-5315u:red:inet";
+	};
+
+	led at 10 {
+		reg = <10>;
+		active-low;
+		label = "AR-5315u:green:dsl";
+	};
+
+	led at 11 {
+		reg = <11>;
+		active-low;
+		label = "AR-5315u:red:power";
+	};
+};
+
+&spi {
+	status = "okay";
+
+	spi-flash at 0 {
+		compatible = "spi-flash";
+		reg = <0>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		spi-max-frequency = <62500000>;
+	};
+};
+
+&uart0 {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
diff --git a/arch/mips/mach-bmips/Kconfig b/arch/mips/mach-bmips/Kconfig
index c9b56f5ca7..e4a0118368 100644
--- a/arch/mips/mach-bmips/Kconfig
+++ b/arch/mips/mach-bmips/Kconfig
@@ -111,6 +111,17 @@ endchoice
 choice
 	prompt "Board select"
 
+config BOARD_COMTREND_AR5315U
+	bool "Comtrend AR-5315u"
+	depends on SOC_BMIPS_BCM6318
+	select BMIPS_SUPPORTS_BOOT_RAM
+	help
+	  Comtrend AR-5315u boards have a BCM6318 SoC with 64 MB of RAM and 16
+	  MB of flash (SPI).
+	  Between its different peripherals there's an integrated switch with 4
+	  ethernet ports, 1 USB port, 1 UART, GPIO buttons and LEDs, and
+	  a BCM43217 (PCIe).
+
 config BOARD_COMTREND_AR5387UN
 	bool "Comtrend AR-5387un"
 	depends on SOC_BMIPS_BCM6328
@@ -217,6 +228,7 @@ endchoice
 config BMIPS_SUPPORTS_BOOT_RAM
 	bool
 
+source "board/comtrend/ar5315u/Kconfig"
 source "board/comtrend/ar5387un/Kconfig"
 source "board/comtrend/ct5361/Kconfig"
 source "board/comtrend/vr3032u/Kconfig"
diff --git a/board/comtrend/ar5315u/Kconfig b/board/comtrend/ar5315u/Kconfig
new file mode 100644
index 0000000000..4baae40009
--- /dev/null
+++ b/board/comtrend/ar5315u/Kconfig
@@ -0,0 +1,12 @@
+if BOARD_COMTREND_AR5315U
+
+config SYS_BOARD
+	default "ar5315u"
+
+config SYS_VENDOR
+	default "comtrend"
+
+config SYS_CONFIG_NAME
+	default "comtrend_ar5315u"
+
+endif
diff --git a/board/comtrend/ar5315u/MAINTAINERS b/board/comtrend/ar5315u/MAINTAINERS
new file mode 100644
index 0000000000..048073cb42
--- /dev/null
+++ b/board/comtrend/ar5315u/MAINTAINERS
@@ -0,0 +1,6 @@
+COMTREND AR-5315U BOARD
+M:	Álvaro Fernández Rojas <noltari@gmail.com>
+S:	Maintained
+F:	board/comtrend/ar-5315u/
+F:	include/configs/comtrend_ar5315u.h
+F:	configs/comtrend_ar5315u_ram_defconfig
diff --git a/board/comtrend/ar5315u/Makefile b/board/comtrend/ar5315u/Makefile
new file mode 100644
index 0000000000..5d2f590375
--- /dev/null
+++ b/board/comtrend/ar5315u/Makefile
@@ -0,0 +1,5 @@
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+
+obj-y += ar-5315u.o
diff --git a/board/comtrend/ar5315u/ar-5315u.c b/board/comtrend/ar5315u/ar-5315u.c
new file mode 100644
index 0000000000..d181ca68a0
--- /dev/null
+++ b/board/comtrend/ar5315u/ar-5315u.c
@@ -0,0 +1,7 @@
+/*
+ * Copyright (C) 2017 Álvaro Fernández Rojas <noltari@gmail.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
diff --git a/configs/comtrend_ar5315u_ram_defconfig b/configs/comtrend_ar5315u_ram_defconfig
new file mode 100644
index 0000000000..84ea67c7c1
--- /dev/null
+++ b/configs/comtrend_ar5315u_ram_defconfig
@@ -0,0 +1,51 @@
+CONFIG_MIPS=y
+CONFIG_SYS_TEXT_BASE=0x80010000
+CONFIG_ARCH_BMIPS=y
+CONFIG_SOC_BMIPS_BCM6318=y
+# CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set
+# CONFIG_MIPS_BOOT_ENV_LEGACY is not set
+CONFIG_MIPS_BOOT_FDT=y
+CONFIG_DEFAULT_DEVICE_TREE="comtrend,ar-5315u"
+# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+CONFIG_OF_STDOUT_VIA_ALIAS=y
+CONFIG_DISPLAY_CPUINFO=y
+CONFIG_HUSH_PARSER=y
+CONFIG_SYS_PROMPT="AR-5315un # "
+CONFIG_CMD_CPU=y
+CONFIG_CMD_LICENSE=y
+# CONFIG_CMD_BOOTD is not set
+# CONFIG_CMD_ELF is not set
+# CONFIG_CMD_XIMG is not set
+# CONFIG_CMD_EXPORTENV is not set
+# CONFIG_CMD_IMPORTENV is not set
+# CONFIG_CMD_EDITENV is not set
+# CONFIG_CMD_SAVEENV is not set
+# CONFIG_CMD_ENV_EXISTS is not set
+# CONFIG_CMD_CRC32 is not set
+CONFIG_CMD_MEMINFO=y
+# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+# CONFIG_CMD_LOADS is not set
+CONFIG_CMD_SF=y
+CONFIG_CMD_SPI=y
+# CONFIG_CMD_NET is not set
+# CONFIG_CMD_NFS is not set
+# CONFIG_CMD_MISC is not set
+# CONFIG_DM_DEVICE_REMOVE is not set
+CONFIG_DM_GPIO=y
+CONFIG_LED=y
+CONFIG_LED_BCM6328=y
+CONFIG_LED_BLINK=y
+CONFIG_DM_SPI_FLASH=y
+CONFIG_SPI_FLASH=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_SPI_FLASH_MTD=y
+CONFIG_POWER_DOMAIN=y
+CONFIG_BCM6328_POWER_DOMAIN=y
+CONFIG_DM_RESET=y
+CONFIG_RESET_BCM6345=y
+# CONFIG_SPL_SERIAL_PRESENT is not set
+CONFIG_DM_SERIAL=y
+CONFIG_BCM6345_SERIAL=y
+CONFIG_DM_SPI=y
+CONFIG_BCM63XX_HSSPI=y
diff --git a/include/configs/comtrend_ar5315u.h b/include/configs/comtrend_ar5315u.h
new file mode 100644
index 0000000000..aa6e8441bf
--- /dev/null
+++ b/include/configs/comtrend_ar5315u.h
@@ -0,0 +1,16 @@
+/*
+ * Copyright (C) 2017 Álvaro Fernández Rojas <noltari@gmail.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <configs/bmips_common.h>
+#include <configs/bmips_bcm6318.h>
+
+#define CONFIG_REMAKE_ELF
+
+#define CONFIG_ENV_SIZE			(8 * 1024)
+
+#define CONFIG_AUTO_COMPLETE
+#define CONFIG_CMDLINE_EDITING
+#define CONFIG_SYS_LONGHELP
-- 
2.11.0

[U-Boot] [PATCH v2 0/4] mips: bmips: add BCM6318 SoC support

[Álvaro Fernández Rojas]

BCM6318 is a single core BCM63xx SoC.

v2: fix bcm6328 typo and add missing ngpios

Álvaro Fernández Rojas (4):
  dm: cpu: bmips: add BCM6318 support
  dm: ram: bmips: add BCM6318 support
  MIPS: add support for Broadcom MIPS BCM6318 SoC family
  MIPS: add BMIPS Comtrend AR-5315u board

 arch/mips/dts/Makefile                             |   1 +
 arch/mips/dts/brcm,bcm6318.dtsi                    | 157 +++++++++++++++++++++
 arch/mips/dts/comtrend,ar-5315u.dts                |  85 +++++++++++
 arch/mips/mach-bmips/Kconfig                       |  24 ++++
 board/comtrend/ar5315u/Kconfig                     |  12 ++
 board/comtrend/ar5315u/MAINTAINERS                 |   6 +
 board/comtrend/ar5315u/Makefile                    |   5 +
 board/comtrend/ar5315u/ar-5315u.c                  |   7 +
 configs/comtrend_ar5315u_ram_defconfig             |  51 +++++++
 drivers/cpu/bmips_cpu.c                            |  35 +++++
 drivers/ram/bmips_ram.c                            |  19 +++
 include/configs/bmips_bcm6318.h                    |  25 ++++
 include/configs/comtrend_ar5315u.h                 |  16 +++
 include/dt-bindings/clock/bcm6318-clock.h          |  37 +++++
 .../power-domain/bcm6318-power-domain.h            |  13 ++
 include/dt-bindings/reset/bcm6318-reset.h          |  26 ++++
 16 files changed, 519 insertions(+)
 create mode 100644 arch/mips/dts/brcm,bcm6318.dtsi
 create mode 100644 arch/mips/dts/comtrend,ar-5315u.dts
 create mode 100644 board/comtrend/ar5315u/Kconfig
 create mode 100644 board/comtrend/ar5315u/MAINTAINERS
 create mode 100644 board/comtrend/ar5315u/Makefile
 create mode 100644 board/comtrend/ar5315u/ar-5315u.c
 create mode 100644 configs/comtrend_ar5315u_ram_defconfig
 create mode 100644 include/configs/bmips_bcm6318.h
 create mode 100644 include/configs/comtrend_ar5315u.h
 create mode 100644 include/dt-bindings/clock/bcm6318-clock.h
 create mode 100644 include/dt-bindings/power-domain/bcm6318-power-domain.h
 create mode 100644 include/dt-bindings/reset/bcm6318-reset.h

-- 
2.11.0

[U-Boot] [PATCH v2 1/4] dm: cpu: bmips: add BCM6318 support

[Álvaro Fernández Rojas]

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
---
 v2: fix bcm6318 typo

 drivers/cpu/bmips_cpu.c | 35 +++++++++++++++++++++++++++++++++++
 1 file changed, 35 insertions(+)

diff --git a/drivers/cpu/bmips_cpu.c b/drivers/cpu/bmips_cpu.c
index 2e3f1de74e..4ad291a56e 100644
--- a/drivers/cpu/bmips_cpu.c
+++ b/drivers/cpu/bmips_cpu.c
@@ -26,6 +26,10 @@ DECLARE_GLOBAL_DATA_PTR;
 #define REG_BCM6328_OTP			0x62c
 #define BCM6328_TP1_DISABLED		BIT(9)
 
+#define REG_BCM6318_STRAP_OVRDBUS	0x900
+#define OVRDBUS_6318_FREQ_SHIFT		23
+#define OVRDBUS_6318_FREQ_MASK		(0x3 << OVRDBUS_6318_FREQ_SHIFT)
+
 #define REG_BCM6328_MISC_STRAPBUS	0x1a40
 #define STRAPBUS_6328_FCVO_SHIFT	7
 #define STRAPBUS_6328_FCVO_MASK		(0x1f << STRAPBUS_6328_FCVO_SHIFT)
@@ -112,6 +116,28 @@ static ulong bcm3380_get_cpu_freq(struct bmips_cpu_priv *priv)
 	return 333000000;
 }
 
+static ulong bcm6318_get_cpu_freq(struct bmips_cpu_priv *priv)
+{
+	unsigned int mips_pll_fcvo;
+
+	mips_pll_fcvo = readl_be(priv->regs + REG_BCM6318_STRAP_OVRDBUS);
+	mips_pll_fcvo = (mips_pll_fcvo & OVRDBUS_6318_FREQ_MASK)
+			>> OVRDBUS_6318_FREQ_SHIFT;
+
+	switch (mips_pll_fcvo) {
+	case 0:
+		return 166000000;
+	case 1:
+		return 400000000;
+	case 2:
+		return 250000000;
+	case 3:
+		return 333000000;
+	default:
+		return 0;
+	}
+}
+
 static ulong bcm6328_get_cpu_freq(struct bmips_cpu_priv *priv)
 {
 	unsigned int mips_pll_fcvo;
@@ -233,6 +259,12 @@ static const struct bmips_cpu_hw bmips_cpu_bcm3380 = {
 	.get_cpu_count = bcm6358_get_cpu_count,
 };
 
+static const struct bmips_cpu_hw bmips_cpu_bcm6318 = {
+	.get_cpu_desc = bmips_short_cpu_desc,
+	.get_cpu_freq = bcm6318_get_cpu_freq,
+	.get_cpu_count = bcm6345_get_cpu_count,
+};
+
 static const struct bmips_cpu_hw bmips_cpu_bcm6328 = {
 	.get_cpu_desc = bmips_long_cpu_desc,
 	.get_cpu_freq = bcm6328_get_cpu_freq,
@@ -348,6 +380,9 @@ static const struct udevice_id bmips_cpu_ids[] = {
 		.compatible = "brcm,bcm3380-cpu",
 		.data = (ulong)&bmips_cpu_bcm3380,
 	}, {
+		.compatible = "brcm,bcm6318-cpu",
+		.data = (ulong)&bmips_cpu_bcm6318,
+	}, {
 		.compatible = "brcm,bcm6328-cpu",
 		.data = (ulong)&bmips_cpu_bcm6328,
 	}, {
-- 
2.11.0

[U-Boot] [PATCH v2 2/4] dm: ram: bmips: add BCM6318 support

[Álvaro Fernández Rojas]

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
---
 v2: no changes

 drivers/ram/bmips_ram.c | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)

diff --git a/drivers/ram/bmips_ram.c b/drivers/ram/bmips_ram.c
index 3f9d9a8566..7a5dfac4ab 100644
--- a/drivers/ram/bmips_ram.c
+++ b/drivers/ram/bmips_ram.c
@@ -23,6 +23,8 @@
 #define SDRAM_CFG_32B_MASK	(1 << SDRAM_CFG_32B_SHIFT)
 #define SDRAM_CFG_BANK_SHIFT	13
 #define SDRAM_CFG_BANK_MASK	(1 << SDRAM_CFG_BANK_SHIFT)
+#define SDRAM_6318_SPACE_SHIFT	4
+#define SDRAM_6318_SPACE_MASK	(0xf << SDRAM_6318_SPACE_SHIFT)
 
 #define MEMC_CFG_REG		0x4
 #define MEMC_CFG_32B_SHIFT	1
@@ -45,6 +47,16 @@ struct bmips_ram_priv {
 	const struct bmips_ram_hw *hw;
 };
 
+static ulong bcm6318_get_ram_size(struct bmips_ram_priv *priv)
+{
+	u32 val;
+
+	val = readl_be(priv->regs + SDRAM_CFG_REG);
+	val = (val & SDRAM_6318_SPACE_MASK) >> SDRAM_6318_SPACE_SHIFT;
+
+	return (1 << (val + 20));
+}
+
 static ulong bcm6328_get_ram_size(struct bmips_ram_priv *priv)
 {
 	return readl_be(priv->regs + DDR_CSEND_REG) << 24;
@@ -102,6 +114,10 @@ static const struct ram_ops bmips_ram_ops = {
 	.get_info = bmips_ram_get_info,
 };
 
+static const struct bmips_ram_hw bmips_ram_bcm6318 = {
+	.get_ram_size = bcm6318_get_ram_size,
+};
+
 static const struct bmips_ram_hw bmips_ram_bcm6328 = {
 	.get_ram_size = bcm6328_get_ram_size,
 };
@@ -116,6 +132,9 @@ static const struct bmips_ram_hw bmips_ram_bcm6358 = {
 
 static const struct udevice_id bmips_ram_ids[] = {
 	{
+		.compatible = "brcm,bcm6318-mc",
+		.data = (ulong)&bmips_ram_bcm6318,
+	}, {
 		.compatible = "brcm,bcm6328-mc",
 		.data = (ulong)&bmips_ram_bcm6328,
 	}, {
-- 
2.11.0

[U-Boot] [PATCH v2 3/4] MIPS: add support for Broadcom MIPS BCM6318 SoC family

[Álvaro Fernández Rojas]

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
---
 v2: add missing ngpios

 arch/mips/dts/brcm,bcm6318.dtsi                    | 157 +++++++++++++++++++++
 arch/mips/mach-bmips/Kconfig                       |  12 ++
 include/configs/bmips_bcm6318.h                    |  25 ++++
 include/dt-bindings/clock/bcm6318-clock.h          |  37 +++++
 .../power-domain/bcm6318-power-domain.h            |  13 ++
 include/dt-bindings/reset/bcm6318-reset.h          |  26 ++++
 6 files changed, 270 insertions(+)
 create mode 100644 arch/mips/dts/brcm,bcm6318.dtsi
 create mode 100644 include/configs/bmips_bcm6318.h
 create mode 100644 include/dt-bindings/clock/bcm6318-clock.h
 create mode 100644 include/dt-bindings/power-domain/bcm6318-power-domain.h
 create mode 100644 include/dt-bindings/reset/bcm6318-reset.h

diff --git a/arch/mips/dts/brcm,bcm6318.dtsi b/arch/mips/dts/brcm,bcm6318.dtsi
new file mode 100644
index 0000000000..54964a7009
--- /dev/null
+++ b/arch/mips/dts/brcm,bcm6318.dtsi
@@ -0,0 +1,157 @@
+/*
+ * Copyright (C) 2018 Álvaro Fernández Rojas <noltari@gmail.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <dt-bindings/clock/bcm6318-clock.h>
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/power-domain/bcm6318-power-domain.h>
+#include <dt-bindings/reset/bcm6318-reset.h>
+#include "skeleton.dtsi"
+
+/ {
+	compatible = "brcm,bcm6318";
+
+	aliases {
+		spi0 = &spi;
+	};
+
+	cpus {
+		reg = <0x10000000 0x4>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		u-boot,dm-pre-reloc;
+
+		cpu at 0 {
+			compatible = "brcm,bcm6318-cpu", "mips,mips4Kc";
+			device_type = "cpu";
+			reg = <0>;
+			u-boot,dm-pre-reloc;
+		};
+	};
+
+	clocks {
+		compatible = "simple-bus";
+		#address-cells = <1>;
+		#size-cells = <1>;
+		u-boot,dm-pre-reloc;
+
+		hsspi_pll: hsspi-pll {
+			compatible = "fixed-clock";
+			#clock-cells = <0>;
+			clock-frequency = <250000000>;
+		};
+
+		periph_osc: periph-osc {
+			compatible = "fixed-clock";
+			#clock-cells = <0>;
+			clock-frequency = <50000000>;
+			u-boot,dm-pre-reloc;
+		};
+
+		periph_clk: periph-clk {
+			compatible = "brcm,bcm6345-clk";
+			reg = <0x10000004 0x4>;
+			#clock-cells = <1>;
+		};
+	};
+
+	ubus {
+		compatible = "simple-bus";
+		#address-cells = <1>;
+		#size-cells = <1>;
+		u-boot,dm-pre-reloc;
+
+		periph_rst: reset-controller at 10000010 {
+			compatible = "brcm,bcm6345-reset";
+			reg = <0x10000010 0x4>;
+			#reset-cells = <1>;
+		};
+
+		wdt: watchdog at 10000068 {
+			compatible = "brcm,bcm6345-wdt";
+			reg = <0x10000068 0xc>;
+			clocks = <&periph_osc>;
+		};
+
+		wdt-reboot {
+			compatible = "wdt-reboot";
+			wdt = <&wdt>;
+		};
+
+		pll_cntl: syscon at 10000074 {
+			compatible = "syscon";
+			reg = <0x10000074 0x4>;
+		};
+
+		syscon-reboot {
+			compatible = "syscon-reboot";
+			regmap = <&pll_cntl>;
+			offset = <0x0>;
+			mask = <0x1>;
+		};
+
+		gpio1: gpio-controller at 10000080 {
+			compatible = "brcm,bcm6345-gpio";
+			reg = <0x10000080 0x4>, <0x10000088 0x4>;
+			gpio-controller;
+			#gpio-cells = <2>;
+			ngpios = <18>;
+
+			status = "disabled";
+		};
+
+		gpio0: gpio-controller at 10000084 {
+			compatible = "brcm,bcm6345-gpio";
+			reg = <0x10000084 0x4>, <0x1000008c 0x4>;
+			gpio-controller;
+			#gpio-cells = <2>;
+
+			status = "disabled";
+		};
+
+		uart0: serial at 10000100 {
+			compatible = "brcm,bcm6345-uart";
+			reg = <0x10000100 0x18>;
+			clocks = <&periph_osc>;
+
+			status = "disabled";
+		};
+
+		leds: led-controller at 10000200 {
+			compatible = "brcm,bcm6328-leds";
+			reg = <0x10000200 0x28>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			status = "disabled";
+		};
+
+		periph_pwr: power-controller at 100008e8 {
+			compatible = "brcm,bcm6328-power-domain";
+			reg = <0x100008e8 0x4>;
+			#power-domain-cells = <1>;
+		};
+
+		spi: spi at 10003000 {
+			compatible = "brcm,bcm6328-hsspi";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0x10003000 0x600>;
+			clocks = <&periph_clk BCM6318_CLK_HSSPI>, <&hsspi_pll>;
+			clock-names = "hsspi", "pll";
+			resets = <&periph_rst BCM6318_RST_SPI>;
+			spi-max-frequency = <33333334>;
+			num-cs = <3>;
+
+			status = "disabled";
+		};
+
+		memory-controller at 10004000 {
+			compatible = "brcm,bcm6318-mc";
+			reg = <0x10004000 0x38>;
+			u-boot,dm-pre-reloc;
+		};
+	};
+};
diff --git a/arch/mips/mach-bmips/Kconfig b/arch/mips/mach-bmips/Kconfig
index 936b67f5f2..c9b56f5ca7 100644
--- a/arch/mips/mach-bmips/Kconfig
+++ b/arch/mips/mach-bmips/Kconfig
@@ -6,6 +6,7 @@ config SYS_MALLOC_F_LEN
 
 config SYS_SOC
 	default "bcm3380" if SOC_BMIPS_BCM3380
+	default "bcm6318" if SOC_BMIPS_BCM6318
 	default "bcm6328" if SOC_BMIPS_BCM6328
 	default "bcm6338" if SOC_BMIPS_BCM6338
 	default "bcm6348" if SOC_BMIPS_BCM6348
@@ -27,6 +28,17 @@ config SOC_BMIPS_BCM3380
 	help
 	  This supports BMIPS BCM3380 family.
 
+config SOC_BMIPS_BCM6318
+	bool "BMIPS BCM6318 family"
+	select SUPPORTS_BIG_ENDIAN
+	select SUPPORTS_CPU_MIPS32_R1
+	select MIPS_TUNE_4KC
+	select MIPS_L1_CACHE_SHIFT_4
+	select SWAP_IO_SPACE
+	select SYSRESET_SYSCON
+	help
+	  This supports BMIPS BCM6318 family.
+
 config SOC_BMIPS_BCM6328
 	bool "BMIPS BCM6328 family"
 	select SUPPORTS_BIG_ENDIAN
diff --git a/include/configs/bmips_bcm6318.h b/include/configs/bmips_bcm6318.h
new file mode 100644
index 0000000000..454a7b7f7b
--- /dev/null
+++ b/include/configs/bmips_bcm6318.h
@@ -0,0 +1,25 @@
+/*
+ * Copyright (C) 2018 Álvaro Fernández Rojas <noltari@gmail.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __CONFIG_BMIPS_BCM6318_H
+#define __CONFIG_BMIPS_BCM6318_H
+
+/* CPU */
+#define CONFIG_SYS_MIPS_TIMER_FREQ	166500000
+
+/* RAM */
+#define CONFIG_NR_DRAM_BANKS		1
+#define CONFIG_SYS_SDRAM_BASE		0x80000000
+
+/* U-Boot */
+#define CONFIG_SYS_LOAD_ADDR		CONFIG_SYS_SDRAM_BASE + 0x100000
+
+#if defined(CONFIG_BMIPS_BOOT_RAM)
+#define CONFIG_SKIP_LOWLEVEL_INIT
+#define CONFIG_SYS_INIT_SP_OFFSET	0x2000
+#endif
+
+#endif /* __CONFIG_BMIPS_BCM6318_H */
diff --git a/include/dt-bindings/clock/bcm6318-clock.h b/include/dt-bindings/clock/bcm6318-clock.h
new file mode 100644
index 0000000000..1e3dc16f90
--- /dev/null
+++ b/include/dt-bindings/clock/bcm6318-clock.h
@@ -0,0 +1,37 @@
+/*
+ * Copyright (C) 2018 Álvaro Fernández Rojas <noltari@gmail.com>
+ *
+ * Derived from linux/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __DT_BINDINGS_CLOCK_BCM6318_H
+#define __DT_BINDINGS_CLOCK_BCM6318_H
+
+#define BCM6318_CLK_ADSL_ASB	0
+#define BCM6318_CLK_USB_ASB	1
+#define BCM6318_CLK_MIPS_ASB	2
+#define BCM6318_CLK_PCIE_ASB	3
+#define BCM6318_CLK_PHYMIPS_ASB	4
+#define BCM6318_CLK_ROBOSW_ASB	5
+#define BCM6318_CLK_SAR_ASB	6
+#define BCM6318_CLK_SDR_ASB	7
+#define BCM6318_CLK_SWREG_ASB	8
+#define BCM6318_CLK_PERIPH_ASB	9
+#define BCM6318_CLK_CPUBUS160	10
+#define BCM6318_CLK_ADSL	11
+#define BCM6318_CLK_SAR125	12
+#define BCM6318_CLK_MIPS	13
+#define BCM6318_CLK_PCIE	14
+#define BCM6318_CLK_ROBOSW250	16
+#define BCM6318_CLK_ROBOSW025	17
+#define BCM6318_CLK_SDR		19
+#define BCM6318_CLK_USB		20
+#define BCM6318_CLK_HSSPI	25
+#define BCM6318_CLK_PCIE25	27
+#define BCM6318_CLK_PHYMIPS	28
+#define BCM6318_CLK_AFE		29
+#define BCM6318_CLK_QPROC	30
+
+#endif /* __DT_BINDINGS_CLOCK_BCM6318_H */
diff --git a/include/dt-bindings/power-domain/bcm6318-power-domain.h b/include/dt-bindings/power-domain/bcm6318-power-domain.h
new file mode 100644
index 0000000000..fb075d2c1c
--- /dev/null
+++ b/include/dt-bindings/power-domain/bcm6318-power-domain.h
@@ -0,0 +1,13 @@
+/*
+ * Copyright (C) 2018 Álvaro Fernández Rojas <noltari@gmail.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __DT_BINDINGS_POWER_DOMAIN_BCM6318_H
+#define __DT_BINDINGS_POWER_DOMAIN_BCM6318_H
+
+#define BCM6318_PWR_PCIE	0
+#define BCM6318_PWR_USB		1
+
+#endif /* __DT_BINDINGS_POWER_DOMAIN_BCM6318_H */
diff --git a/include/dt-bindings/reset/bcm6318-reset.h b/include/dt-bindings/reset/bcm6318-reset.h
new file mode 100644
index 0000000000..781d7fbc4d
--- /dev/null
+++ b/include/dt-bindings/reset/bcm6318-reset.h
@@ -0,0 +1,26 @@
+/*
+ * Copyright (C) 2018 Álvaro Fernández Rojas <noltari@gmail.com>
+ *
+ * Derived from linux/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __DT_BINDINGS_RESET_BCM6318_H
+#define __DT_BINDINGS_RESET_BCM6318_H
+
+#define BCM6318_RST_SPI		0
+#define BCM6318_RST_EPHY	1
+#define BCM6318_RST_SAR		2
+#define BCM6318_RST_ENETSW	3
+#define BCM6318_RST_USBD	4
+#define BCM6318_RST_USBH	5
+#define BCM6318_RST_PCIE_CORE	6
+#define BCM6318_RST_PCIE	7
+#define BCM6318_RST_PCIE_EXT	8
+#define BCM6318_RST_PCIE_HARD	9
+#define BCM6318_RST_ADSL	10
+#define BCM6318_RST_PHYMIPS	11
+#define BCM6318_RST_HOSTMIPS	11
+
+#endif /* __DT_BINDINGS_RESET_BCM6318_H */
-- 
2.11.0

[U-Boot] [PATCH v2 4/4] MIPS: add BMIPS Comtrend AR-5315u board

[Álvaro Fernández Rojas]

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
---
 v2: no changes

 arch/mips/dts/Makefile                 |  1 +
 arch/mips/dts/comtrend,ar-5315u.dts    | 85 ++++++++++++++++++++++++++++++++++
 arch/mips/mach-bmips/Kconfig           | 12 +++++
 board/comtrend/ar5315u/Kconfig         | 12 +++++
 board/comtrend/ar5315u/MAINTAINERS     |  6 +++
 board/comtrend/ar5315u/Makefile        |  5 ++
 board/comtrend/ar5315u/ar-5315u.c      |  7 +++
 configs/comtrend_ar5315u_ram_defconfig | 51 ++++++++++++++++++++
 include/configs/comtrend_ar5315u.h     | 16 +++++++
 9 files changed, 195 insertions(+)
 create mode 100644 arch/mips/dts/comtrend,ar-5315u.dts
 create mode 100644 board/comtrend/ar5315u/Kconfig
 create mode 100644 board/comtrend/ar5315u/MAINTAINERS
 create mode 100644 board/comtrend/ar5315u/Makefile
 create mode 100644 board/comtrend/ar5315u/ar-5315u.c
 create mode 100644 configs/comtrend_ar5315u_ram_defconfig
 create mode 100644 include/configs/comtrend_ar5315u.h

diff --git a/arch/mips/dts/Makefile b/arch/mips/dts/Makefile
index 72848ed1b4..840dbf170d 100644
--- a/arch/mips/dts/Makefile
+++ b/arch/mips/dts/Makefile
@@ -8,6 +8,7 @@ dtb-$(CONFIG_TARGET_BOSTON) += img,boston.dtb
 dtb-$(CONFIG_TARGET_MALTA) += mti,malta.dtb
 dtb-$(CONFIG_TARGET_PIC32MZDASK) += pic32mzda_sk.dtb
 dtb-$(CONFIG_TARGET_XILFPGA) += nexys4ddr.dtb
+dtb-$(CONFIG_BOARD_COMTREND_AR5315U) += comtrend,ar-5315u.dtb
 dtb-$(CONFIG_BOARD_COMTREND_AR5387UN) += comtrend,ar-5387un.dtb
 dtb-$(CONFIG_BOARD_COMTREND_CT5361) += comtrend,ct-5361.dtb
 dtb-$(CONFIG_BOARD_COMTREND_VR3032U) += comtrend,vr-3032u.dtb
diff --git a/arch/mips/dts/comtrend,ar-5315u.dts b/arch/mips/dts/comtrend,ar-5315u.dts
new file mode 100644
index 0000000000..4e4d69b638
--- /dev/null
+++ b/arch/mips/dts/comtrend,ar-5315u.dts
@@ -0,0 +1,85 @@
+/*
+ * Copyright (C) 2018 Álvaro Fernández Rojas <noltari@gmail.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+/dts-v1/;
+
+#include "brcm,bcm6318.dtsi"
+
+/ {
+	model = "Comtrend AR-5315u";
+	compatible = "comtrend,ar5315-un", "brcm,bcm6318";
+
+	aliases {
+		serial0 = &uart0;
+	};
+
+	chosen {
+		stdout-path = "serial0:115200n8";
+	};
+};
+
+&leds {
+	status = "okay";
+
+	led at 0 {
+		reg = <0>;
+		active-low;
+		label = "AR-5315u:green:wps";
+	};
+
+	led at 1 {
+		reg = <1>;
+		active-low;
+		label = "AR-5315u:green:power";
+	};
+
+	led at 2 {
+		reg = <2>;
+		active-low;
+		label = "AR-5315u:green:usb";
+	};
+
+	led at 8 {
+		reg = <8>;
+		active-low;
+		label = "AR-5315u:green:inet";
+	};
+
+	led at 9 {
+		reg = <9>;
+		active-low;
+		label = "AR-5315u:red:inet";
+	};
+
+	led at 10 {
+		reg = <10>;
+		active-low;
+		label = "AR-5315u:green:dsl";
+	};
+
+	led at 11 {
+		reg = <11>;
+		active-low;
+		label = "AR-5315u:red:power";
+	};
+};
+
+&spi {
+	status = "okay";
+
+	spi-flash at 0 {
+		compatible = "spi-flash";
+		reg = <0>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		spi-max-frequency = <62500000>;
+	};
+};
+
+&uart0 {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
diff --git a/arch/mips/mach-bmips/Kconfig b/arch/mips/mach-bmips/Kconfig
index c9b56f5ca7..e4a0118368 100644
--- a/arch/mips/mach-bmips/Kconfig
+++ b/arch/mips/mach-bmips/Kconfig
@@ -111,6 +111,17 @@ endchoice
 choice
 	prompt "Board select"
 
+config BOARD_COMTREND_AR5315U
+	bool "Comtrend AR-5315u"
+	depends on SOC_BMIPS_BCM6318
+	select BMIPS_SUPPORTS_BOOT_RAM
+	help
+	  Comtrend AR-5315u boards have a BCM6318 SoC with 64 MB of RAM and 16
+	  MB of flash (SPI).
+	  Between its different peripherals there's an integrated switch with 4
+	  ethernet ports, 1 USB port, 1 UART, GPIO buttons and LEDs, and
+	  a BCM43217 (PCIe).
+
 config BOARD_COMTREND_AR5387UN
 	bool "Comtrend AR-5387un"
 	depends on SOC_BMIPS_BCM6328
@@ -217,6 +228,7 @@ endchoice
 config BMIPS_SUPPORTS_BOOT_RAM
 	bool
 
+source "board/comtrend/ar5315u/Kconfig"
 source "board/comtrend/ar5387un/Kconfig"
 source "board/comtrend/ct5361/Kconfig"
 source "board/comtrend/vr3032u/Kconfig"
diff --git a/board/comtrend/ar5315u/Kconfig b/board/comtrend/ar5315u/Kconfig
new file mode 100644
index 0000000000..4baae40009
--- /dev/null
+++ b/board/comtrend/ar5315u/Kconfig
@@ -0,0 +1,12 @@
+if BOARD_COMTREND_AR5315U
+
+config SYS_BOARD
+	default "ar5315u"
+
+config SYS_VENDOR
+	default "comtrend"
+
+config SYS_CONFIG_NAME
+	default "comtrend_ar5315u"
+
+endif
diff --git a/board/comtrend/ar5315u/MAINTAINERS b/board/comtrend/ar5315u/MAINTAINERS
new file mode 100644
index 0000000000..048073cb42
--- /dev/null
+++ b/board/comtrend/ar5315u/MAINTAINERS
@@ -0,0 +1,6 @@
+COMTREND AR-5315U BOARD
+M:	Álvaro Fernández Rojas <noltari@gmail.com>
+S:	Maintained
+F:	board/comtrend/ar-5315u/
+F:	include/configs/comtrend_ar5315u.h
+F:	configs/comtrend_ar5315u_ram_defconfig
diff --git a/board/comtrend/ar5315u/Makefile b/board/comtrend/ar5315u/Makefile
new file mode 100644
index 0000000000..5d2f590375
--- /dev/null
+++ b/board/comtrend/ar5315u/Makefile
@@ -0,0 +1,5 @@
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+
+obj-y += ar-5315u.o
diff --git a/board/comtrend/ar5315u/ar-5315u.c b/board/comtrend/ar5315u/ar-5315u.c
new file mode 100644
index 0000000000..bdb3acafad
--- /dev/null
+++ b/board/comtrend/ar5315u/ar-5315u.c
@@ -0,0 +1,7 @@
+/*
+ * Copyright (C) 2018 Álvaro Fernández Rojas <noltari@gmail.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
diff --git a/configs/comtrend_ar5315u_ram_defconfig b/configs/comtrend_ar5315u_ram_defconfig
new file mode 100644
index 0000000000..84ea67c7c1
--- /dev/null
+++ b/configs/comtrend_ar5315u_ram_defconfig
@@ -0,0 +1,51 @@
+CONFIG_MIPS=y
+CONFIG_SYS_TEXT_BASE=0x80010000
+CONFIG_ARCH_BMIPS=y
+CONFIG_SOC_BMIPS_BCM6318=y
+# CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set
+# CONFIG_MIPS_BOOT_ENV_LEGACY is not set
+CONFIG_MIPS_BOOT_FDT=y
+CONFIG_DEFAULT_DEVICE_TREE="comtrend,ar-5315u"
+# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+CONFIG_OF_STDOUT_VIA_ALIAS=y
+CONFIG_DISPLAY_CPUINFO=y
+CONFIG_HUSH_PARSER=y
+CONFIG_SYS_PROMPT="AR-5315un # "
+CONFIG_CMD_CPU=y
+CONFIG_CMD_LICENSE=y
+# CONFIG_CMD_BOOTD is not set
+# CONFIG_CMD_ELF is not set
+# CONFIG_CMD_XIMG is not set
+# CONFIG_CMD_EXPORTENV is not set
+# CONFIG_CMD_IMPORTENV is not set
+# CONFIG_CMD_EDITENV is not set
+# CONFIG_CMD_SAVEENV is not set
+# CONFIG_CMD_ENV_EXISTS is not set
+# CONFIG_CMD_CRC32 is not set
+CONFIG_CMD_MEMINFO=y
+# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+# CONFIG_CMD_LOADS is not set
+CONFIG_CMD_SF=y
+CONFIG_CMD_SPI=y
+# CONFIG_CMD_NET is not set
+# CONFIG_CMD_NFS is not set
+# CONFIG_CMD_MISC is not set
+# CONFIG_DM_DEVICE_REMOVE is not set
+CONFIG_DM_GPIO=y
+CONFIG_LED=y
+CONFIG_LED_BCM6328=y
+CONFIG_LED_BLINK=y
+CONFIG_DM_SPI_FLASH=y
+CONFIG_SPI_FLASH=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_SPI_FLASH_MTD=y
+CONFIG_POWER_DOMAIN=y
+CONFIG_BCM6328_POWER_DOMAIN=y
+CONFIG_DM_RESET=y
+CONFIG_RESET_BCM6345=y
+# CONFIG_SPL_SERIAL_PRESENT is not set
+CONFIG_DM_SERIAL=y
+CONFIG_BCM6345_SERIAL=y
+CONFIG_DM_SPI=y
+CONFIG_BCM63XX_HSSPI=y
diff --git a/include/configs/comtrend_ar5315u.h b/include/configs/comtrend_ar5315u.h
new file mode 100644
index 0000000000..3fda2d9b3a
--- /dev/null
+++ b/include/configs/comtrend_ar5315u.h
@@ -0,0 +1,16 @@
+/*
+ * Copyright (C) 2018 Álvaro Fernández Rojas <noltari@gmail.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <configs/bmips_common.h>
+#include <configs/bmips_bcm6318.h>
+
+#define CONFIG_REMAKE_ELF
+
+#define CONFIG_ENV_SIZE			(8 * 1024)
+
+#define CONFIG_AUTO_COMPLETE
+#define CONFIG_CMDLINE_EDITING
+#define CONFIG_SYS_LONGHELP
-- 
2.11.0

[U-Boot] [PATCH v2 1/4] dm: cpu: bmips: add BCM6318 support

[Daniel Schwierzeck]

On 20.01.2018 19:16, Álvaro Fernández Rojas wrote:
> Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
> ---
>  v2: fix bcm6318 typo
> 
>  drivers/cpu/bmips_cpu.c | 35 +++++++++++++++++++++++++++++++++++
>  1 file changed, 35 insertions(+)
> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>

-- 
- Daniel

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[U-Boot] [PATCH v2 2/4] dm: ram: bmips: add BCM6318 support

[Daniel Schwierzeck]

On 20.01.2018 19:16, Álvaro Fernández Rojas wrote:
> Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
> ---
>  v2: no changes
> 
>  drivers/ram/bmips_ram.c | 19 +++++++++++++++++++
>  1 file changed, 19 insertions(+)
> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>

-- 
- Daniel

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[U-Boot] [PATCH v2 3/4] MIPS: add support for Broadcom MIPS BCM6318 SoC family

[Daniel Schwierzeck]

On 20.01.2018 19:16, Álvaro Fernández Rojas wrote:
> Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
> ---
>  v2: add missing ngpios
> 
>  arch/mips/dts/brcm,bcm6318.dtsi                    | 157 +++++++++++++++++++++
>  arch/mips/mach-bmips/Kconfig                       |  12 ++
>  include/configs/bmips_bcm6318.h                    |  25 ++++
>  include/dt-bindings/clock/bcm6318-clock.h          |  37 +++++
>  .../power-domain/bcm6318-power-domain.h            |  13 ++
>  include/dt-bindings/reset/bcm6318-reset.h          |  26 ++++
>  6 files changed, 270 insertions(+)
>  create mode 100644 arch/mips/dts/brcm,bcm6318.dtsi
>  create mode 100644 include/configs/bmips_bcm6318.h
>  create mode 100644 include/dt-bindings/clock/bcm6318-clock.h
>  create mode 100644 include/dt-bindings/power-domain/bcm6318-power-domain.h
>  create mode 100644 include/dt-bindings/reset/bcm6318-reset.h
> 
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>

-- 
- Daniel

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[U-Boot] [PATCH v2 4/4] MIPS: add BMIPS Comtrend AR-5315u board

[Daniel Schwierzeck]

On 20.01.2018 19:16, Álvaro Fernández Rojas wrote:
> Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
> ---
>  v2: no changes
> 
>  arch/mips/dts/Makefile                 |  1 +
>  arch/mips/dts/comtrend,ar-5315u.dts    | 85 ++++++++++++++++++++++++++++++++++
>  arch/mips/mach-bmips/Kconfig           | 12 +++++
>  board/comtrend/ar5315u/Kconfig         | 12 +++++
>  board/comtrend/ar5315u/MAINTAINERS     |  6 +++
>  board/comtrend/ar5315u/Makefile        |  5 ++
>  board/comtrend/ar5315u/ar-5315u.c      |  7 +++
>  configs/comtrend_ar5315u_ram_defconfig | 51 ++++++++++++++++++++
>  include/configs/comtrend_ar5315u.h     | 16 +++++++
>  9 files changed, 195 insertions(+)
>  create mode 100644 arch/mips/dts/comtrend,ar-5315u.dts
>  create mode 100644 board/comtrend/ar5315u/Kconfig
>  create mode 100644 board/comtrend/ar5315u/MAINTAINERS
>  create mode 100644 board/comtrend/ar5315u/Makefile
>  create mode 100644 board/comtrend/ar5315u/ar-5315u.c
>  create mode 100644 configs/comtrend_ar5315u_ram_defconfig
>  create mode 100644 include/configs/comtrend_ar5315u.h
> 
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>

-- 
- Daniel

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[U-Boot] [PATCH v2 2/4] dm: ram: bmips: add BCM6318 support

[Daniel Schwierzeck]

On 20.01.2018 19:16, Álvaro Fernández Rojas wrote:
> Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
> ---
>  v2: no changes
> 
>  drivers/ram/bmips_ram.c | 19 +++++++++++++++++++
>  1 file changed, 19 insertions(+)
> 

Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>

-- 
- Daniel

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[U-Boot] [PATCH v2 1/4] dm: cpu: bmips: add BCM6318 support

[Daniel Schwierzeck]

On 20.01.2018 19:16, Álvaro Fernández Rojas wrote:
> Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
> ---
>  v2: fix bcm6318 typo
> 
>  drivers/cpu/bmips_cpu.c | 35 +++++++++++++++++++++++++++++++++++
>  1 file changed, 35 insertions(+)
> 

Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>

-- 
- Daniel

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[U-Boot] [PATCH 0/4] mips: bmips: add BCM6318 SoC support

[Daniel Schwierzeck]

On 20.01.2018 14:17, Álvaro Fernández Rojas wrote:
> BCM6318 is a single core BCM63xx SoC.
> 
> Álvaro Fernández Rojas (4):
>   dm: cpu: bmips: add BCM6318 support
>   dm: ram: bmips: add BCM6318 support
>   MIPS: add support for Broadcom MIPS BCM6318 SoC family
>   MIPS: add BMIPS Comtrend AR-5315u board
> 
>  arch/mips/dts/Makefile                             |   1 +
>  arch/mips/dts/brcm,bcm6318.dtsi                    | 156 +++++++++++++++++++++
>  arch/mips/dts/comtrend,ar-5315u.dts                |  85 +++++++++++
>  arch/mips/mach-bmips/Kconfig                       |  24 ++++
>  board/comtrend/ar5315u/Kconfig                     |  12 ++
>  board/comtrend/ar5315u/MAINTAINERS                 |   6 +
>  board/comtrend/ar5315u/Makefile                    |   5 +
>  board/comtrend/ar5315u/ar-5315u.c                  |   7 +
>  configs/comtrend_ar5315u_ram_defconfig             |  51 +++++++
>  drivers/cpu/bmips_cpu.c                            |  35 +++++
>  drivers/ram/bmips_ram.c                            |  19 +++
>  include/configs/bmips_bcm6318.h                    |  25 ++++
>  include/configs/comtrend_ar5315u.h                 |  16 +++
>  include/dt-bindings/clock/bcm6318-clock.h          |  37 +++++
>  .../power-domain/bcm6318-power-domain.h            |  13 ++
>  include/dt-bindings/reset/bcm6318-reset.h          |  26 ++++
>  16 files changed, 518 insertions(+)
>  create mode 100644 arch/mips/dts/brcm,bcm6318.dtsi
>  create mode 100644 arch/mips/dts/comtrend,ar-5315u.dts
>  create mode 100644 board/comtrend/ar5315u/Kconfig
>  create mode 100644 board/comtrend/ar5315u/MAINTAINERS
>  create mode 100644 board/comtrend/ar5315u/Makefile
>  create mode 100644 board/comtrend/ar5315u/ar-5315u.c
>  create mode 100644 configs/comtrend_ar5315u_ram_defconfig
>  create mode 100644 include/configs/bmips_bcm6318.h
>  create mode 100644 include/configs/comtrend_ar5315u.h
>  create mode 100644 include/dt-bindings/clock/bcm6318-clock.h
>  create mode 100644 include/dt-bindings/power-domain/bcm6318-power-domain.h
>  create mode 100644 include/dt-bindings/reset/bcm6318-reset.h
> 

applied to u-boot-mips, thanks.

-- 
- Daniel

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