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From: Jagan Teki <jagan@amarulasolutions.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH 13/14] spi: atmel: Drop atmel_spi.h
Date: Wed, 14 Mar 2018 18:46:43 +0530	[thread overview]
Message-ID: <20180314131644.9508-14-jagan@amarulasolutions.com> (raw)
In-Reply-To: <20180314131644.9508-1-jagan@amarulasolutions.com>

atmel_spi.h has register offsets, and atmel_spi_slave
structure, move it into .c file for better readability
and drop atmel_spi.h

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
---
 drivers/spi/atmel_spi.c | 97 ++++++++++++++++++++++++++++++++++++++++++++-----
 drivers/spi/atmel_spi.h | 84 ------------------------------------------
 2 files changed, 88 insertions(+), 93 deletions(-)
 delete mode 100644 drivers/spi/atmel_spi.h

diff --git a/drivers/spi/atmel_spi.c b/drivers/spi/atmel_spi.c
index 122c6d107d..bb2262cc1f 100644
--- a/drivers/spi/atmel_spi.c
+++ b/drivers/spi/atmel_spi.c
@@ -22,11 +22,90 @@
 #include <asm/gpio.h>
 #endif
 
-#include "atmel_spi.h"
-
 DECLARE_GLOBAL_DATA_PTR;
 
-#define MAX_CS_COUNT	4
+/* Register offsets */
+#define ATMEL_SPI_CR			0x0000
+#define ATMEL_SPI_MR			0x0004
+#define ATMEL_SPI_RDR			0x0008
+#define ATMEL_SPI_TDR			0x000c
+#define ATMEL_SPI_SR			0x0010
+#define ATMEL_SPI_IER			0x0014
+#define ATMEL_SPI_IDR			0x0018
+#define ATMEL_SPI_IMR			0x001c
+#define ATMEL_SPI_CSR(x)		(0x0030 + 4 * (x))
+#define ATMEL_SPI_VERSION		0x00fc
+
+/* Bits in CR */
+#define ATMEL_SPI_CR_SPIEN		BIT(0)
+#define ATMEL_SPI_CR_SPIDIS		BIT(1)
+#define ATMEL_SPI_CR_SWRST		BIT(7)
+#define ATMEL_SPI_CR_LASTXFER		BIT(24)
+
+/* Bits in MR */
+#define ATMEL_SPI_MR_MSTR		BIT(0)
+#define ATMEL_SPI_MR_PS			BIT(1)
+#define ATMEL_SPI_MR_PCSDEC		BIT(2)
+#define ATMEL_SPI_MR_FDIV		BIT(3)
+#define ATMEL_SPI_MR_MODFDIS		BIT(4)
+#define ATMEL_SPI_MR_WDRBT		BIT(5)
+#define ATMEL_SPI_MR_LLB		BIT(7)
+#define ATMEL_SPI_MR_PCS(x)		(((x) & 15) << 16)
+#define ATMEL_SPI_MR_DLYBCS(x)		((x) << 24)
+
+/* Bits in RDR */
+#define ATMEL_SPI_RDR_RD(x)		(x)
+#define ATMEL_SPI_RDR_PCS(x)		((x) << 16)
+
+/* Bits in TDR */
+#define ATMEL_SPI_TDR_TD(x)		(x)
+#define ATMEL_SPI_TDR_PCS(x)		((x) << 16)
+#define ATMEL_SPI_TDR_LASTXFER		BIT(24)
+
+/* Bits in SR/IER/IDR/IMR */
+#define ATMEL_SPI_SR_RDRF		BIT(0)
+#define ATMEL_SPI_SR_TDRE		BIT(1)
+#define ATMEL_SPI_SR_MODF		BIT(2)
+#define ATMEL_SPI_SR_OVRES		BIT(3)
+#define ATMEL_SPI_SR_ENDRX		BIT(4)
+#define ATMEL_SPI_SR_ENDTX		BIT(5)
+#define ATMEL_SPI_SR_RXBUFF		BIT(6)
+#define ATMEL_SPI_SR_TXBUFE		BIT(7)
+#define ATMEL_SPI_SR_NSSR		BIT(8)
+#define ATMEL_SPI_SR_TXEMPTY		BIT(9)
+#define ATMEL_SPI_SR_SPIENS		BIT(16)
+
+/* Bits in CSRx */
+#define ATMEL_SPI_CSR_CPOL		BIT(0)
+#define ATMEL_SPI_CSR_NCPHA		BIT(1)
+#define ATMEL_SPI_CSR_CSAAT		BIT(3)
+#define ATMEL_SPI_CSR_BITS(x)		((x) << 4)
+#define ATMEL_SPI_CSR_SCBR(x)		((x) << 8)
+#define ATMEL_SPI_CSR_SCBR_MAX		GENMASK(7, 0)
+#define ATMEL_SPI_CSR_DLYBS(x)		((x) << 16)
+#define ATMEL_SPI_CSR_DLYBCT(x)		((x) << 24)
+
+/* Bits in VERSION */
+#define ATMEL_SPI_VERSION_REV(x)	((x) & 0xfff)
+#define ATMEL_SPI_VERSION_MFN(x)	((x) << 16)
+
+/* Constants for CSRx:BITS */
+#define ATMEL_SPI_BITS_8		0
+#define ATMEL_SPI_BITS_9		1
+#define ATMEL_SPI_BITS_10		2
+#define ATMEL_SPI_BITS_11		3
+#define ATMEL_SPI_BITS_12		4
+#define ATMEL_SPI_BITS_13		5
+#define ATMEL_SPI_BITS_14		6
+#define ATMEL_SPI_BITS_15		7
+#define ATMEL_SPI_BITS_16		8
+
+#define MAX_CS_COUNT			4
+
+struct atmel_spi_slave {
+	void		*regs;
+	u32		mr;
+};
 
 struct atmel_spi_platdata {
 	struct at91_spi *regs;
@@ -53,19 +132,19 @@ static int atmel_spi_claim_bus(struct udevice *dev)
 	u32 scbr, csrx, mode;
 
 	scbr = (priv->bus_clk_rate + freq - 1) / freq;
-	if (scbr > ATMEL_SPI_CSRx_SCBR_MAX)
+	if (scbr > ATMEL_SPI_CSR_SCBR_MAX)
 		return -EINVAL;
 
 	if (scbr < 1)
 		scbr = 1;
 
-	csrx = ATMEL_SPI_CSRx_SCBR(scbr);
-	csrx |= ATMEL_SPI_CSRx_BITS(ATMEL_SPI_BITS_8);
+	csrx = ATMEL_SPI_CSR_SCBR(scbr);
+	csrx |= ATMEL_SPI_CSR_BITS(ATMEL_SPI_BITS_8);
 
 	if (!(priv->mode & SPI_CPHA))
-		csrx |= ATMEL_SPI_CSRx_NCPHA;
+		csrx |= ATMEL_SPI_CSR_NCPHA;
 	if (priv->mode & SPI_CPOL)
-		csrx |= ATMEL_SPI_CSRx_CPOL;
+		csrx |= ATMEL_SPI_CSR_CPOL;
 
 	writel(csrx, &reg_base->csr[cs]);
 
@@ -287,7 +366,7 @@ static int atmel_spi_probe(struct udevice *bus)
 		return ret;
 	}
 
-	for(i = 0; i < ARRAY_SIZE(priv->cs_gpios); i++) {
+	for (i = 0; i < ARRAY_SIZE(priv->cs_gpios); i++) {
 		if (!dm_gpio_is_valid(&priv->cs_gpios[i]))
 			continue;
 
diff --git a/drivers/spi/atmel_spi.h b/drivers/spi/atmel_spi.h
deleted file mode 100644
index 685eeed99e..0000000000
--- a/drivers/spi/atmel_spi.h
+++ /dev/null
@@ -1,84 +0,0 @@
-/*
- * Register definitions for the Atmel AT32/AT91 SPI Controller
- */
-
-/* Register offsets */
-#define ATMEL_SPI_CR			0x0000
-#define ATMEL_SPI_MR			0x0004
-#define ATMEL_SPI_RDR			0x0008
-#define ATMEL_SPI_TDR			0x000c
-#define ATMEL_SPI_SR			0x0010
-#define ATMEL_SPI_IER			0x0014
-#define ATMEL_SPI_IDR			0x0018
-#define ATMEL_SPI_IMR			0x001c
-#define ATMEL_SPI_CSR(x)		(0x0030 + 4 * (x))
-#define ATMEL_SPI_VERSION		0x00fc
-
-/* Bits in CR */
-#define ATMEL_SPI_CR_SPIEN		BIT(0)
-#define ATMEL_SPI_CR_SPIDIS		BIT(1)
-#define ATMEL_SPI_CR_SWRST		BIT(7)
-#define ATMEL_SPI_CR_LASTXFER		BIT(24)
-
-/* Bits in MR */
-#define ATMEL_SPI_MR_MSTR		BIT(0)
-#define ATMEL_SPI_MR_PS			BIT(1)
-#define ATMEL_SPI_MR_PCSDEC		BIT(2)
-#define ATMEL_SPI_MR_FDIV		BIT(3)
-#define ATMEL_SPI_MR_MODFDIS		BIT(4)
-#define ATMEL_SPI_MR_WDRBT		BIT(5)
-#define ATMEL_SPI_MR_LLB		BIT(7)
-#define ATMEL_SPI_MR_PCS(x)		(((x) & 15) << 16)
-#define ATMEL_SPI_MR_DLYBCS(x)		((x) << 24)
-
-/* Bits in RDR */
-#define ATMEL_SPI_RDR_RD(x)		(x)
-#define ATMEL_SPI_RDR_PCS(x)		((x) << 16)
-
-/* Bits in TDR */
-#define ATMEL_SPI_TDR_TD(x)		(x)
-#define ATMEL_SPI_TDR_PCS(x)		((x) << 16)
-#define ATMEL_SPI_TDR_LASTXFER		BIT(24)
-
-/* Bits in SR/IER/IDR/IMR */
-#define ATMEL_SPI_SR_RDRF		BIT(0)
-#define ATMEL_SPI_SR_TDRE		BIT(1)
-#define ATMEL_SPI_SR_MODF		BIT(2)
-#define ATMEL_SPI_SR_OVRES		BIT(3)
-#define ATMEL_SPI_SR_ENDRX		BIT(4)
-#define ATMEL_SPI_SR_ENDTX		BIT(5)
-#define ATMEL_SPI_SR_RXBUFF		BIT(6)
-#define ATMEL_SPI_SR_TXBUFE		BIT(7)
-#define ATMEL_SPI_SR_NSSR		BIT(8)
-#define ATMEL_SPI_SR_TXEMPTY		BIT(9)
-#define ATMEL_SPI_SR_SPIENS		BIT(16)
-
-/* Bits in CSRx */
-#define ATMEL_SPI_CSRx_CPOL		BIT(0)
-#define ATMEL_SPI_CSRx_NCPHA		BIT(1)
-#define ATMEL_SPI_CSRx_CSAAT		BIT(3)
-#define ATMEL_SPI_CSRx_BITS(x)		((x) << 4)
-#define ATMEL_SPI_CSRx_SCBR(x)		((x) << 8)
-#define ATMEL_SPI_CSRx_SCBR_MAX		GENMASK(7, 0)
-#define ATMEL_SPI_CSRx_DLYBS(x)		((x) << 16)
-#define ATMEL_SPI_CSRx_DLYBCT(x)	((x) << 24)
-
-/* Bits in VERSION */
-#define ATMEL_SPI_VERSION_REV(x)	((x) & 0xfff)
-#define ATMEL_SPI_VERSION_MFN(x)	((x) << 16)
-
-/* Constants for CSRx:BITS */
-#define ATMEL_SPI_BITS_8		0
-#define ATMEL_SPI_BITS_9		1
-#define ATMEL_SPI_BITS_10		2
-#define ATMEL_SPI_BITS_11		3
-#define ATMEL_SPI_BITS_12		4
-#define ATMEL_SPI_BITS_13		5
-#define ATMEL_SPI_BITS_14		6
-#define ATMEL_SPI_BITS_15		7
-#define ATMEL_SPI_BITS_16		8
-
-struct atmel_spi_slave {
-	void		*regs;
-	u32		mr;
-};
-- 
2.14.3

  parent reply	other threads:[~2018-03-14 13:16 UTC|newest]

Thread overview: 37+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-03-14 13:16 [U-Boot] [PATCH 00/14] at91: Add boards with OF_CONTROL/DM/DM_SPI Jagan Teki
2018-03-14 13:16 ` [U-Boot] [PATCH 01/14] spi: atmel: Add ifdef for DM_GPIO code Jagan Teki
2018-03-21  4:08   ` Wenyou Yang
2018-04-06 20:28   ` [U-Boot] [U-Boot,01/14] " Tom Rini
2018-03-14 13:16 ` [U-Boot] [PATCH 02/14] at91: gurnard: Enable DM_SPI Jagan Teki
2018-04-06 20:28   ` [U-Boot] [U-Boot,02/14] " Tom Rini
2018-03-14 13:16 ` [U-Boot] [PATCH 03/14] configs: gurnard: Move CONFIG_ATMEL_SPI to defconfigs Jagan Teki
2018-03-21  4:09   ` Wenyou Yang
2018-04-06 20:29   ` [U-Boot] [U-Boot, " Tom Rini
2018-03-14 13:16 ` [U-Boot] [PATCH 04/14] at91: taurus: Enable DM_SPI Jagan Teki
2018-04-06 20:29   ` [U-Boot] [U-Boot,04/14] " Tom Rini
2018-03-14 13:16 ` [U-Boot] [PATCH 05/14] at91: vinco: Enable DM Jagan Teki
2018-04-06 20:29   ` [U-Boot] [U-Boot,05/14] " Tom Rini
2018-03-14 13:16 ` [U-Boot] [PATCH 06/14] at91: vinco: Add FDT support Jagan Teki
2018-04-06 20:29   ` [U-Boot] [U-Boot,06/14] " Tom Rini
2018-03-14 13:16 ` [U-Boot] [PATCH 07/14] at91: vinco: Enable DM_SPI Jagan Teki
2018-04-06 20:29   ` [U-Boot] [U-Boot,07/14] " Tom Rini
2018-03-14 13:16 ` [U-Boot] [PATCH 08/14] at91: ma5d4evk: Enable DM Jagan Teki
2018-04-06 20:29   ` [U-Boot] [U-Boot,08/14] " Tom Rini
2018-03-14 13:16 ` [U-Boot] [PATCH 09/14] at91: ma5d4evk: Add FDT support Jagan Teki
2018-04-06 20:29   ` [U-Boot] [U-Boot,09/14] " Tom Rini
2018-03-14 13:16 ` [U-Boot] [PATCH 10/14] at91: ma5d4evk: Enable DM_SPI Jagan Teki
2018-04-06 20:29   ` [U-Boot] [U-Boot,10/14] " Tom Rini
2018-03-14 13:16 ` [U-Boot] [PATCH 11/14] at91: ma5d4evk: Enable SPL_DM and SPL_OF_CONTROL Jagan Teki
2018-04-06 20:29   ` [U-Boot] [U-Boot, " Tom Rini
2018-03-14 13:16 ` [U-Boot] [PATCH 12/14] spi: atmel: Drop non-dm code Jagan Teki
2018-03-21  4:10   ` Wenyou Yang
2018-04-06 20:29   ` [U-Boot] [U-Boot,12/14] " Tom Rini
2018-04-07 13:24     ` Tom Rini
2018-03-14 13:16 ` Jagan Teki [this message]
2018-03-21  4:11   ` [U-Boot] [PATCH 13/14] spi: atmel: Drop atmel_spi.h Wenyou Yang
2018-04-06 20:29   ` [U-Boot] [U-Boot,13/14] " Tom Rini
2018-04-07 13:24     ` Tom Rini
2018-03-14 13:16 ` [U-Boot] [PATCH 14/14] spi: atmel: default y if DM_SPI && ARCH_AT91 Jagan Teki
2018-03-21  4:13   ` Wenyou Yang
2018-04-06 20:29   ` [U-Boot] [U-Boot, " Tom Rini
2018-03-15  9:43 ` [U-Boot] [PATCH 00/14] at91: Add boards with OF_CONTROL/DM/DM_SPI Jagan Teki

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