From: Tom Rini <trini@konsulko.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [U-Boot,2/3] clk: at91: add PLLADIV driver
Date: Fri, 16 Mar 2018 09:50:41 -0400 [thread overview]
Message-ID: <20180316135041.GL4418@bill-the-cat.ec.rr.com> (raw)
In-Reply-To: <20180209033452.15448-3-wenyou.yang@microchip.com>
On Fri, Feb 09, 2018 at 11:34:51AM +0800, Wenyou Yang wrote:
> As said in the SAMA5D2 datasheet, the PLLA clock must be divided
> by 2 by writing the PLLADIV2 bit in PMC_MCKR, if the ratio between
> PCK and MCK is 3 (MDIV = 3). This is the purpose of the driver.
>
> Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
Applied to u-boot/master, thanks!
--
Tom
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next prev parent reply other threads:[~2018-03-16 13:50 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-02-09 3:34 [U-Boot] [PATCH 0/3] clk: at91: add usb and plladiv drivers Wenyou Yang
2018-02-09 3:34 ` [U-Boot] [PATCH 1/3] clk: at91: add USB Host clock driver Wenyou Yang
2018-03-16 13:50 ` [U-Boot] [U-Boot,1/3] " Tom Rini
2018-02-09 3:34 ` [U-Boot] [PATCH 2/3] clk: at91: add PLLADIV driver Wenyou Yang
2018-03-16 13:50 ` Tom Rini [this message]
2018-02-09 3:34 ` [U-Boot] [PATCH 3/3] clk: at91: clk-system: add set/get_rate operations Wenyou Yang
2018-03-16 13:50 ` [U-Boot] [U-Boot, " Tom Rini
2018-03-06 4:02 ` [U-Boot] [PATCH 0/3] clk: at91: add usb and plladiv drivers Wenyou Yang
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