From mboxrd@z Thu Jan  1 00:00:00 1970
From: Ivan Gorinov <ivan.gorinov@intel.com>
Date: Fri, 30 Mar 2018 17:24:30 -0700
Subject: [U-Boot] [PATCH] timer: Add High Precision Event Timers (HPET)
 support
In-Reply-To: <CAHp75Vc75AcQ_R4smqjvozOd4O4egqAVv4CDPoEOz1TA5pjiUg@mail.gmail.com>
References: <20180329005844.GA63828@intel.com>
 <1522320730.21176.56.camel@linux.intel.com>
 <CAPnjgZ38nvxWcELRGXHcU8ivES4zLWy1gd-Kx_AA6Q0sTsXLpw@mail.gmail.com>
 <CAHp75Vc75AcQ_R4smqjvozOd4O4egqAVv4CDPoEOz1TA5pjiUg@mail.gmail.com>
Message-ID: <20180331002430.GA45891@intel.com>
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On Fri, Mar 30, 2018 at 10:42:57PM +0300, Andy Shevchenko wrote:
> On Fri, Mar 30, 2018 at 1:39 AM, Simon Glass <sjg@chromium.org> wrote:
> > On 29 March 2018 at 18:52, Andy Shevchenko
> > <andriy.shevchenko@linux.intel.com> wrote:
> 
> >> First question is how this will work in case of Broadwell and Ivybridge
> >> that have something to do with HPET in their CPU code, i.e.
> >>
> >> arch/x86/cpu/broadwell/pch.c
> >> arch/x86/cpu/ivybridge/lpc.c
> >>
> >> ?
> >>
> >> Look for
> >>
> >>     clrsetbits_le32(RCB_REG(HPTC), 3, 1 << 7);
> 
> 
> > Perhaps that code can be removed in favour of this driver? I am happy
> > to test on these platforms if it helps.
> 
> That's my point.
> 

This code performs platform-specific enabling and may be required
for the generic HPET driver and OS kernel to work.