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From: Ivan Gorinov <ivan.gorinov@intel.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH] x86: Use microcode update from device tree for all processors
Date: Fri, 20 Apr 2018 10:47:57 -0700	[thread overview]
Message-ID: <20180420174757.GA2940@intel.com> (raw)
In-Reply-To: <CAEUhbmWo8fLWn8LAqvb8Lk+zLjRJSK0Ouws_Ck_gX-gRtSVo_Q@mail.gmail.com>

Hi Bin,

On Wed, Apr 18, 2018 at 07:05:28PM -0600, Bin Meng wrote:
> >> >
> >> > If there is no ROM image, ucode_base and ucode_size are not initialized and
> >> > the microcode update data from DTB applied by microcode_update_intel() to the
> >> > bootstrap CPU is not used by the multiprocessing code.
> >>
> >> Correct. If it's not a ROM image, which means U-Boot is probably not
> >> the 1st stage bootloader, which means updating microcode is not
> >> necessary. So is there any issue with current implementation?
> >
> > If the 1st stage bootloader is running from the on-chip SRAM, there may be
> > not enough space to include the microcode update data. In this case, U-Boot
> > is a secondary boot loader but still has to update the microcode.
> 
> Thanks for the information. Correct, if that's the case, then we
> should tune our codes to support that.
> 
> But I guess the "1st stage" bootloader is loaded by some on-chip
> BOOTROM to the internal SRAM?

Correct.

> Is the "1st stage" bootloader running from SRAM the U-Boot SPL? Or
> some proprietary implementation?

It's usually a proprietary implementation.

  reply	other threads:[~2018-04-20 17:47 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-04-04 23:07 [U-Boot] [PATCH] x86: Use microcode update from device tree for all processors Ivan Gorinov
2018-04-05 11:07 ` Andy Shevchenko
2018-04-05 15:31 ` Bin Meng
2018-04-17 18:29   ` Ivan Gorinov
2018-04-18 12:48     ` Bin Meng
2018-04-19  0:11       ` Ivan Gorinov
2018-04-19  1:05         ` Bin Meng
2018-04-20 17:47           ` Ivan Gorinov [this message]
2018-06-12  2:05             ` Bin Meng

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