From: Jagan Teki <jagan@amarulasolutions.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH v6] musb: sunxi: Use BIT instead of numerical shift
Date: Thu, 26 Apr 2018 15:50:18 +0530 [thread overview]
Message-ID: <20180426102020.31058-3-jagan@amarulasolutions.com> (raw)
In-Reply-To: <20180426102020.31058-1-jagan@amarulasolutions.com>
Use BIT is possible areas instead of numerical shift.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
---
Changes for v6:
- new patch on top of sunxi PHY series
drivers/usb/musb-new/sunxi.c | 28 ++++++++++++++--------------
1 file changed, 14 insertions(+), 14 deletions(-)
diff --git a/drivers/usb/musb-new/sunxi.c b/drivers/usb/musb-new/sunxi.c
index e79d7a2774..16551c7cf8 100644
--- a/drivers/usb/musb-new/sunxi.c
+++ b/drivers/usb/musb-new/sunxi.c
@@ -94,9 +94,9 @@ static u32 USBC_WakeUp_ClearChangeDetect(u32 reg_val)
{
u32 temp = reg_val;
- temp &= ~(1 << USBC_BP_ISCR_VBUS_CHANGE_DETECT);
- temp &= ~(1 << USBC_BP_ISCR_ID_CHANGE_DETECT);
- temp &= ~(1 << USBC_BP_ISCR_DPDM_CHANGE_DETECT);
+ temp &= ~BIT(USBC_BP_ISCR_VBUS_CHANGE_DETECT);
+ temp &= ~BIT(USBC_BP_ISCR_ID_CHANGE_DETECT);
+ temp &= ~BIT(USBC_BP_ISCR_DPDM_CHANGE_DETECT);
return temp;
}
@@ -106,7 +106,7 @@ static void USBC_EnableIdPullUp(__iomem void *base)
u32 reg_val;
reg_val = musb_readl(base, USBC_REG_o_ISCR);
- reg_val |= (1 << USBC_BP_ISCR_ID_PULLUP_EN);
+ reg_val |= BIT(USBC_BP_ISCR_ID_PULLUP_EN);
reg_val = USBC_WakeUp_ClearChangeDetect(reg_val);
musb_writel(base, USBC_REG_o_ISCR, reg_val);
}
@@ -116,7 +116,7 @@ static void USBC_EnableDpDmPullUp(__iomem void *base)
u32 reg_val;
reg_val = musb_readl(base, USBC_REG_o_ISCR);
- reg_val |= (1 << USBC_BP_ISCR_DPDM_PULLUP_EN);
+ reg_val |= BIT(USBC_BP_ISCR_DPDM_PULLUP_EN);
reg_val = USBC_WakeUp_ClearChangeDetect(reg_val);
musb_writel(base, USBC_REG_o_ISCR, reg_val);
}
@@ -172,7 +172,7 @@ static void USBC_ConfigFIFO_Base(void)
/* config usb fifo, 8kb mode */
reg_value = readl(SUNXI_SRAMC_BASE + 0x04);
reg_value &= ~(0x03 << 0);
- reg_value |= (1 << 0);
+ reg_value |= BIT(0);
writel(reg_value, SUNXI_SRAMC_BASE + 0x04);
}
@@ -276,15 +276,15 @@ static int sunxi_musb_init(struct musb *musb)
musb->isr = sunxi_musb_interrupt;
- setbits_le32(&glue->ccm->ahb_gate0, 1 << AHB_GATE_OFFSET_USB0);
+ setbits_le32(&glue->ccm->ahb_gate0, BIT(AHB_GATE_OFFSET_USB0));
if (glue->cfg->clkgate_bit)
setbits_le32(&glue->ccm->ahb_gate0,
- 1 << glue->cfg->clkgate_bit);
+ BIT(glue->cfg->clkgate_bit));
#ifdef CONFIG_SUNXI_GEN_SUN6I
- setbits_le32(&glue->ccm->ahb_reset0_cfg, 1 << AHB_GATE_OFFSET_USB0);
+ setbits_le32(&glue->ccm->ahb_reset0_cfg, BIT(AHB_GATE_OFFSET_USB0));
if (glue->cfg->rst_bit)
setbits_le32(&glue->ccm->ahb_reset0_cfg,
- 1 << glue->cfg->rst_bit);
+ BIT(glue->cfg->rst_bit));
#endif
sunxi_usb_phy_init(0);
@@ -416,15 +416,15 @@ static int musb_usb_remove(struct udevice *dev)
sunxi_usb_phy_exit(0);
#ifdef CONFIG_SUNXI_GEN_SUN6I
- clrbits_le32(&glue->ccm->ahb_reset0_cfg, 1 << AHB_GATE_OFFSET_USB0);
+ clrbits_le32(&glue->ccm->ahb_reset0_cfg, BIT(AHB_GATE_OFFSET_USB0));
if (glue->cfg->rst_bit)
clrbits_le32(&glue->ccm->ahb_reset0_cfg,
- 1 << glue->cfg->rst_bit);
+ BIT(glue->cfg->rst_bit));
#endif
- clrbits_le32(&glue->ccm->ahb_gate0, 1 << AHB_GATE_OFFSET_USB0);
+ clrbits_le32(&glue->ccm->ahb_gate0, BIT(AHB_GATE_OFFSET_USB0));
if (glue->cfg->clkgate_bit)
clrbits_le32(&glue->ccm->ahb_gate0,
- 1 << glue->cfg->clkgate_bit);
+ BIT(glue->cfg->clkgate_bit));
free(host->host);
host->host = NULL;
--
2.14.3
next prev parent reply other threads:[~2018-04-26 10:20 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-04-26 10:20 [U-Boot] [PATCH v6 04/34] musb: sunxi: Add fifo config Jagan Teki
2018-04-26 10:20 ` [U-Boot] [PATCH v6 06/34] musb: sunxi: Add OTG device clkgate and reset for H3/H5 Jagan Teki
2018-04-26 10:20 ` Jagan Teki [this message]
2018-04-26 10:20 ` [U-Boot] [PATCH v6 03/34] musb: sunxi: Use simple way to fill musb_hdrc pdata Jagan Teki
2018-04-26 10:20 ` [U-Boot] [PATCH v6 07/34] sunxi: clock: Fix OHCI clock gating for H3/H5 Jagan Teki
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