From: Vasily Khoruzhick <anarsoul@gmail.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH v2 1/2] sunxi: video: HDMI: use correct bits for HSYNC and VSYNC polarity.
Date: Mon, 14 May 2018 13:49:52 -0700 [thread overview]
Message-ID: <20180514204953.11606-2-anarsoul@gmail.com> (raw)
In-Reply-To: <20180514204953.11606-1-anarsoul@gmail.com>
HSYNC is bit 8, and VSYNC is bit 9.
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
---
drivers/video/sunxi/sunxi_dw_hdmi.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/video/sunxi/sunxi_dw_hdmi.c b/drivers/video/sunxi/sunxi_dw_hdmi.c
index c78e33b947..9dbea649a0 100644
--- a/drivers/video/sunxi/sunxi_dw_hdmi.c
+++ b/drivers/video/sunxi/sunxi_dw_hdmi.c
@@ -303,10 +303,10 @@ static int sunxi_dw_hdmi_enable(struct udevice *dev, int panel_bpp,
sunxi_dw_hdmi_lcdc_init(priv->mux, edid, panel_bpp);
- if (edid->flags & DISPLAY_FLAGS_HSYNC_LOW)
+ if (edid->flags & DISPLAY_FLAGS_VSYNC_LOW)
setbits_le32(&phy->pol, 0x200);
- if (edid->flags & DISPLAY_FLAGS_VSYNC_LOW)
+ if (edid->flags & DISPLAY_FLAGS_HSYNC_LOW)
setbits_le32(&phy->pol, 0x100);
setbits_le32(&phy->ctrl, 0xf << 12);
--
2.17.0
next prev parent reply other threads:[~2018-05-14 20:49 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-05-14 20:49 [U-Boot] [PATCH v2 0/2] video: dw_hdmi: fix HSYNC and VSYNC polarity settings Vasily Khoruzhick
2018-05-14 20:49 ` Vasily Khoruzhick [this message]
2018-05-15 5:15 ` [U-Boot] [PATCH v2 1/2] sunxi: video: HDMI: use correct bits for HSYNC and VSYNC polarity Jernej Škrabec
2018-05-14 20:49 ` [U-Boot] [PATCH v2 2/2] video: dw_hdmi: fix HSYNC and VSYNC polarity settings Vasily Khoruzhick
2018-05-15 5:15 ` Jernej Škrabec
2018-05-15 6:08 ` [U-Boot] [PATCH v2 0/2] " Anatolij Gustschin
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