[U-Boot] IMX6 NAND booting failure

[U-Boot] IMX6 NAND booting failure

[Rasheed, Abdul]

Hi,
I am working on VAR-SOM-MX6 SOC. I'm trying to boot a custom SPL from NAND.
After programming NAND with custom SPL, system goes to serial downloader mode. I have taken the ROM code buffer log (also attached below). It shows that authentication fails. My boot security settings are OPEN, so even though authentication fails it should handover the control to SPL, which ROM code doesn't and system goes to serial downloader mode. I was able to attach JTAG and read the registers of core and it shows that LR is 0x000B0000. Which is exactly what it should be. Because it was expected to jump to entry point.


00902190 = 00010002 000200F0 00030000 00040000
009021A0 = 00050001 00060000 00070000 000700F0
009021B0 = 00080000 00000280 000800F0 00080000
009021C0 = 00000282 00080033 00090000 000A1E33
009021D0 = 00061FFF 000C0000 00000000 00000000
009021E0 = 00000000 00000000 00000000 00000000
009021F0 = 00000000 00000000 00000000 00000000
00902200 = 00000000 00000000 00000000 00000000
00902210 = 00000000 00000000 00000000 00000000
00902220 = 00000000 00000000 00000000 00000000
00902230 = 00000000 00000000 00000000 00000000
00902240 = 00000000 00000000 00000000 00000000
00902250 = 00000000 00000000 00000000 00000000
00902260 = 00000000 00000000 00000000 00000000
00902270 = 00000000 00000000 00000000 00000000
00902280 = 00000000 00000000 00000000 00000000
00902290 = 00000000 03040103 00000409 00030101
009022A0 = 06810040 00002200 0112008C 00000200
009022B0 = 15A24000 00010054 01000201 0200060A


Regards,
Abdul Rasheed

[U-Boot] IMX6 NAND booting failure

[Lukasz Majewski]

Hi Rasheed,

> Hi,
> I am working on VAR-SOM-MX6 SOC. I'm trying to boot a custom SPL from
> NAND. After programming NAND with custom SPL, system goes to serial
> downloader mode. I have taken the ROM code buffer log (also attached
> below). It shows that authentication fails. My boot security settings
> are OPEN, so even though authentication fails it should handover the
> control to SPL, which ROM code doesn't and system goes to serial
> downloader mode. I was able to attach JTAG and read the registers of
> core and it shows that LR is 0x000B0000. Which is exactly what it
> should be. Because it was expected to jump to entry point.
> 
> 
> 00902190 = 00010002 000200F0 00030000 00040000
> 009021A0 = 00050001 00060000 00070000 000700F0
> 009021B0 = 00080000 00000280 000800F0 00080000
> 009021C0 = 00000282 00080033 00090000 000A1E33
> 009021D0 = 00061FFF 000C0000 00000000 00000000
> 009021E0 = 00000000 00000000 00000000 00000000
> 009021F0 = 00000000 00000000 00000000 00000000
> 00902200 = 00000000 00000000 00000000 00000000
> 00902210 = 00000000 00000000 00000000 00000000
> 00902220 = 00000000 00000000 00000000 00000000
> 00902230 = 00000000 00000000 00000000 00000000
> 00902240 = 00000000 00000000 00000000 00000000
> 00902250 = 00000000 00000000 00000000 00000000
> 00902260 = 00000000 00000000 00000000 00000000
> 00902270 = 00000000 00000000 00000000 00000000
> 00902280 = 00000000 00000000 00000000 00000000
> 00902290 = 00000000 03040103 00000409 00030101
> 009022A0 = 06810040 00002200 0112008C 00000200
> 009022B0 = 15A24000 00010054 01000201 0200060A
> 

Shouldn't the NAND consist of some extra configuration data?

> 
> Regards,
> Abdul Rasheed
> 
> _______________________________________________
> U-Boot mailing list
> U-Boot at lists.denx.de
> https://lists.denx.de/listinfo/u-boot




Best regards,

Lukasz Majewski

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