From: Tom Rini <trini@konsulko.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH 2/4] ARM: Introduce ability to enable invalidate of BTB with ICIALLU on Cortex-A15 for CVE-2017-5715
Date: Wed, 13 Jun 2018 11:46:27 -0400 [thread overview]
Message-ID: <20180613154627.GP350@bill-the-cat.ec.rr.com> (raw)
In-Reply-To: <20180613133215.2cv7iyjb2laaha3j@kahuna>
On Wed, Jun 13, 2018 at 08:32:15AM -0500, Nishanth Menon wrote:
> On 23:05-20180612, Marek Vasut wrote:
> > On 06/12/2018 10:24 PM, Nishanth Menon wrote:
> [..]
> > > +#ifdef CONFIG_ARM_CORTEX_A15_CVE_2017_5715
> > > + mrc p15, 0, r0, c1, c0, 1 @ read auxilary control register
> > > + orr r0, r0, #1 << 0 @ Enable invalidates of BTB
> >
> > Can we use BIT() macro in the assembler code too ?
>
> Probably, but just following convention in the rest of the file. Do we
> want to change from existing code?
Agreed, we should follow the existing style (and I'm not 100% sure I
like using BIT() in asm files).
--
Tom
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next prev parent reply other threads:[~2018-06-13 15:46 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-06-12 20:24 [U-Boot] [PATCH 0/4] ARM: Provide workaround setup bits for CVE-2017-5715 (A8/A15) Nishanth Menon
2018-06-12 20:24 ` [U-Boot] [PATCH 1/4] ARM: Introduce ability to enable ACR::IBE on Cortex-A8 for CVE-2017-5715 Nishanth Menon
2018-06-20 14:13 ` Fabio Estevam
2018-06-29 20:53 ` [U-Boot] [U-Boot, " Tom Rini
2018-06-12 20:24 ` [U-Boot] [PATCH 2/4] ARM: Introduce ability to enable invalidate of BTB with ICIALLU on Cortex-A15 " Nishanth Menon
2018-06-12 23:05 ` Marek Vasut
2018-06-13 13:32 ` Nishanth Menon
2018-06-13 15:46 ` Tom Rini [this message]
2018-06-13 21:32 ` Nishanth Menon
2018-06-13 23:06 ` Marek Vasut
2018-06-13 0:30 ` Florian Fainelli
2018-06-13 13:37 ` Nishanth Menon
2018-06-13 21:36 ` Florian Fainelli
2018-06-14 12:46 ` Nishanth Menon
2018-06-20 14:14 ` Fabio Estevam
2018-06-29 20:53 ` [U-Boot] [U-Boot, " Tom Rini
2018-06-12 20:24 ` [U-Boot] [PATCH 3/4] ARM: mach-omap2: omap5/dra7: Enable ACTLR[0] (Enable invalidates of BTB) to facilitate CVE_2017-5715 WA in OS Nishanth Menon
2018-06-12 23:06 ` Marek Vasut
2018-06-13 13:40 ` Nishanth Menon
2018-06-13 17:36 ` Russell King - ARM Linux
2018-06-13 20:36 ` Marek Vasut
2018-06-13 21:31 ` Nishanth Menon
2018-06-13 21:47 ` Russell King - ARM Linux
2018-06-29 20:53 ` [U-Boot] [U-Boot, " Tom Rini
2018-06-12 20:24 ` [U-Boot] [PATCH 4/4] ARM: mach-omap2: omap3/am335x: Enable ACR::IBE on Cortex-A8 SoCs for CVE-2017-5715 Nishanth Menon
2018-06-29 20:53 ` [U-Boot] [U-Boot, " Tom Rini
2018-06-12 23:06 ` [U-Boot] [PATCH 0/4] ARM: Provide workaround setup bits for CVE-2017-5715 (A8/A15) Marek Vasut
2018-06-18 18:48 ` Tom Rini
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