[U-Boot] tpm TIS TPMv2.0

[Miquel Raynal <miquel.raynal@bootlin.com>]

Hi Martin (Avnet Silica),

On Mon, 18 Jun 2018 09:29:33 +0000, "Hecht, Martin (Avnet Silica)"
<Martin.Hecht@avnet.eu> wrote:

> Hi Miquel,
> > -----Original Message-----
> > From: Miquel Raynal [mailto:miquel.raynal at bootlin.com]
> > Sent: Montag, 18. Juni 2018 11:22
> > To: Hecht, Martin (Avnet Silica) <Martin.Hecht@avnet.eu>
> > Cc: sjg at chromium.org; u-boot at lists.denx.de; Roeder, Michael (Avnet Silica)
> > <Michael.Roeder@avnet.eu>
> > Subject: Re: [U-Boot] tpm TIS TPMv2.0
> > 
> > Hi Martin,
> > 
> > On Mon, 18 Jun 2018 09:13:36 +0000, "Hecht, Martin (Avnet Silica)"
> > <Martin.Hecht@avnet.eu> wrote:
> >   
> > > Hi Miquèl,
> > >  
> > > > -----Original Message-----
> > > > From: Miquel Raynal [mailto:miquel.raynal at bootlin.com]
> > > > Sent: Montag, 18. Juni 2018 10:43
> > > > To: Hecht, Martin (Avnet Silica) <Martin.Hecht@avnet.eu>
> > > > Cc: sjg at chromium.org; u-boot at lists.denx.de
> > > > Subject: Re: [U-Boot] tpm TIS TPMv2.0
> > > >
> > > > Hi Martin,
> > > >
> > > > On Mon, 18 Jun 2018 08:20:20 +0000, "Hecht, Martin (Avnet Silica)"
> > > > <Martin.Hecht@avnet.eu> wrote:
> > > >  
> > > > > Hi Miquel,
> > > > >  
> > > > > > -----Original Message-----
> > > > > > From: Miquel Raynal [mailto:miquel.raynal at bootlin.com]
> > > > > > Sent: Montag, 18. Juni 2018 10:05
> > > > > > To: Hecht, Martin (Avnet Silica) <Martin.Hecht@avnet.eu>
> > > > > > Cc: sjg at chromium.org; u-boot at lists.denx.de
> > > > > > Subject: Re: [U-Boot] tpm TIS TPMv2.0
> > > > > >
> > > > > > Hi Martin,
> > > > > >
> > > > > > On Fri, 15 Jun 2018 13:34:07 +0000, "Hecht, Martin (Avnet Silica)"
> > > > > > <Martin.Hecht@avnet.eu> wrote:
> > > > > >  
> > > > > > > Hi Miquel, Simon,
> > > > > > >
> > > > > > > Is there any specific reason why the new tpm2_tis_spi_xfer
> > > > > > > doesn't  
> > > > > > support full duplex? It seems we did some work in parallel but
> > > > > > you sent the patches earlier. Is that codes tested against an
> > > > > > existing TPM v2? I have a working implementation what runs on
> > > > > > SLB9670 including  
> > > > full duplex.  
> > > > > >
> > > > > > What do you mean exactly?
> > > > > >
> > > > > > I don't think the TPM2 protocol makes real use of full-duplex
> > > > > > unless for the wait state between the host command and the actual  
> > xfer.  
> > > > >
> > > > > You are right, TIS 1.3 FIFO doesn’t use full duplex in physical
> > > > > level. What I  
> > > > mean is that the driver you just wrote doesn't use the xfer function
> > > > in that way that you can specify in and out parameters at same time.
> > > > I did this in my implementation what gave me an easy chance to control  
> > the CS# of the TPM.  
> > > >
> > > > Do you need this CS# handling for more advanced features? Same
> > > > question for the in/out xfers?
> > > >  
> > > > > Can you tell me on what TPM did you test? For the SLB9670 the code
> > > > > doesn't work on my hardware.  
> > > >
> > > > I tested with a ST33TPHF20 SPI TPM.
> > > >
> > > > I'm surprised it did not work with an SLB9670, I don't see anything
> > > > in the spec explaining this CS# specificity.  
> > >
> > > The CS# may controls an internal state machine and the SLB9670 uses that  
> > signal.
> > 
> > Ok, can you explain what should be done (and where/when) to make it work
> > with the SLB9670?  
> Please let me come back with my proposal soon. I have already the tpm running 
> with my little different driver. There is another patch required for my SoC to 
> setup the SPI correctly.

ok

> Nevertheless one question: Why did you define another dts binding instead of 
> using that one what is already available on the Linux kernel? There is 
> "tcg,tpm_tis-spi"  already defined.

I did not know this one, actually I mostly worked on U-Boot.

However, this compatible is misleading as it does not make any
difference between v1.x and v2.0 specification.

Regards,
Miquèl