From mboxrd@z Thu Jan 1 00:00:00 1970 From: Miquel Raynal Date: Thu, 12 Jul 2018 16:46:23 +0200 Subject: [U-Boot] [PATCH v2 13/21] spi: Extend the core to ease integration of SPI memory controllers In-Reply-To: References: <20180711152529.24547-1-miquel.raynal@bootlin.com> <20180711152529.24547-14-miquel.raynal@bootlin.com> Message-ID: <20180712164623.4219e40a@xps13> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable To: u-boot@lists.denx.de Hi Stefan, > > + memset(tx_buf + pos, 0xff, op->dummy.nbytes); > > + pos +=3D op->dummy.nbytes; > > + } > > + > > + if (tx_data) > > + memcpy(tx_buf + pos, op->data.buf.out, op->data.nbytes); > > + > > + ret =3D spi_xfer(slave, xfer_len * 8, tx_buf, rx_buf, > > + SPI_XFER_BEGIN | SPI_XFER_END); > > + spi_release_bus(slave); > > + > > + for (i =3D 0; i < pos; i++) > > + debug("%02x ", tx_buf[i]); > > + debug("| [%dB %s] ", > > + tx_data || rx_data ? op->data.nbytes : 0, > > + tx_data || rx_data ? (tx_data ? "out" : "in") : "-"); > > + for (; i < xfer_len; i++) > > + debug("%02x ", rx_buf[i]); =20 >=20 > debug("%02x ", tx_data ? tx_buf[i] : rx_buf[i]); >=20 > I won't have much more time today. Will get back to this in ~2 weeks. Sure! Debug line changed. Thanks, Miqu=C3=A8l