[U-Boot] [PATCH 06/11] mx7dsabresd: Add Windows boot support for iMX7 Sabre

[Henry Beberman <Henry.Beberman@microsoft.com>]

From: Henry Beberman <henry.beberman@microsoft.com>

This patch adds a new bootable configuration for Windows 10 IoT Core on
the i.MX7 Dual Sabre board.

It enables SPL on the i.MX7 Sabre in order to support the FIT load of
OP-TEE and U-Boot proper.

Signed-off-by: Henry Beberman <henry.beberman@microsoft.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Adrian Alonso <adrian.alonso@nxp.com>
---
 arch/arm/mach-imx/mx7/Kconfig             |   1 +
 board/freescale/mx7dsabresd/MAINTAINERS   |   1 +
 board/freescale/mx7dsabresd/mx7dsabresd.c |  79 +++++++++++++++++++++++
 configs/mx7dsabresd_nt_defconfig          | 102 ++++++++++++++++++++++++++++++
 drivers/gpio/Makefile                     |   3 +
 drivers/pinctrl/nxp/pinctrl-imx7.c        |   4 +-
 include/configs/mx7dsabresd.h             |  10 +++
 7 files changed, 199 insertions(+), 1 deletion(-)
 create mode 100644 configs/mx7dsabresd_nt_defconfig

diff --git a/arch/arm/mach-imx/mx7/Kconfig b/arch/arm/mach-imx/mx7/Kconfig
index 2a3db860bb..0aaf246a79 100644
--- a/arch/arm/mach-imx/mx7/Kconfig
+++ b/arch/arm/mach-imx/mx7/Kconfig
@@ -33,6 +33,7 @@ config TARGET_MX7DSABRESD
 	select MX7D
 	select DM
 	select DM_THERMAL
+	select SUPPORT_SPL
 
 config TARGET_PICO_IMX7D
 	bool "pico-imx7d"
diff --git a/board/freescale/mx7dsabresd/MAINTAINERS b/board/freescale/mx7dsabresd/MAINTAINERS
index b96642a568..1fc9b2a491 100644
--- a/board/freescale/mx7dsabresd/MAINTAINERS
+++ b/board/freescale/mx7dsabresd/MAINTAINERS
@@ -4,3 +4,4 @@ S:	Maintained
 F:	board/freescale/mx7dsabresd
 F:	include/configs/mx7dsabresd.h
 F:	configs/mx7dsabresd_defconfig
+F:	configs/mx7dsabresd_nt_defconfig
\ No newline at end of file
diff --git a/board/freescale/mx7dsabresd/mx7dsabresd.c b/board/freescale/mx7dsabresd/mx7dsabresd.c
index 90e2d1a92a..db34609caf 100644
--- a/board/freescale/mx7dsabresd/mx7dsabresd.c
+++ b/board/freescale/mx7dsabresd/mx7dsabresd.c
@@ -46,6 +46,9 @@ DECLARE_GLOBAL_DATA_PTR;
 
 #define NAND_PAD_READY0_CTRL (PAD_CTL_DSE_3P3V_49OHM | PAD_CTL_PUS_PU5KOHM)
 
+#define USDHC_PAD_CTRL (PAD_CTL_DSE_3P3V_32OHM | PAD_CTL_SRE_SLOW | \
+			PAD_CTL_HYS | PAD_CTL_PUE | PAD_CTL_PUS_PU47KOHM)
+
 #ifdef CONFIG_MXC_SPI
 static iomux_v3_cfg_t const ecspi3_pads[] = {
     MX7D_PAD_SAI2_RX_DATA__ECSPI3_SCLK | MUX_PAD_CTRL(SPI_PAD_CTRL),
@@ -363,6 +366,75 @@ int power_init_board(void)
 }
 #endif
 
+#ifdef CONFIG_SPL_BUILD
+#include <spl.h>
+
+#if !CONFIG_IS_ENABLED(DM_MMC)
+static iomux_v3_cfg_t const usdhc1_pads[] = {
+	MX7D_PAD_SD1_CLK__SD1_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+	MX7D_PAD_SD1_CMD__SD1_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+	MX7D_PAD_SD1_DATA0__SD1_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+	MX7D_PAD_SD1_DATA1__SD1_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+	MX7D_PAD_SD1_DATA2__SD1_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+	MX7D_PAD_SD1_DATA3__SD1_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+
+	MX7D_PAD_SD1_CD_B__GPIO5_IO0 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+	MX7D_PAD_SD1_WP__GPIO5_IO1 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+	MX7D_PAD_SD1_RESET_B__SD1_RESET_B | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+};
+
+#define USDHC1_CD IMX_GPIO_NR(5, 0)
+#define USDHC1_WP IMX_GPIO_NR(5, 1)
+
+int board_mmc_init(bd_t *bis)
+{
+	struct fsl_esdhc_cfg usdhc_cfg = {};
+
+	imx_iomux_v3_setup_multiple_pads(usdhc1_pads, ARRAY_SIZE(usdhc1_pads));
+	gpio_direction_input(USDHC1_CD);
+	gpio_direction_input(USDHC1_WP);
+
+	usdhc_cfg.esdhc_base = USDHC1_BASE_ADDR;
+	usdhc_cfg.sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK);
+	usdhc_cfg.max_bus_width = 4;
+
+	return fsl_esdhc_initialize(bis, &usdhc_cfg);
+}
+
+int board_mmc_getcd(struct mmc *mmc)
+{
+	struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv;
+	int ret = 0;
+
+	switch (cfg->esdhc_base) {
+	case USDHC1_BASE_ADDR:
+		ret = !gpio_get_value(USDHC1_CD);
+		break;
+	}
+
+	return ret;
+}
+#endif
+
+void board_init_f(ulong dummy)
+{
+	/* Clear the BSS. */
+	memset(__bss_start, 0, __bss_end - __bss_start);
+
+	setup_iomux_uart();
+
+	/* setup AIPS and disable watchdog */
+	arch_cpu_init();
+
+	/* setup GP timer */
+	timer_init();
+
+	preloader_console_init();
+
+	/* No need to initialize DRAM; handled by DCD script */
+}
+#endif
+
 int board_late_init(void)
 {
 	struct wdog_regs *wdog = (struct wdog_regs *)WDOG1_BASE_ADDR;
@@ -393,3 +465,10 @@ int checkboard(void)
 
 	return 0;
 }
+
+#if defined(CONFIG_MULTI_DTB_FIT) || defined(CONFIG_SPL_LOAD_FIT)
+int board_fit_config_name_match(const char *name)
+{
+	return 0;
+}
+#endif
diff --git a/configs/mx7dsabresd_nt_defconfig b/configs/mx7dsabresd_nt_defconfig
new file mode 100644
index 0000000000..9bb0fe1b54
--- /dev/null
+++ b/configs/mx7dsabresd_nt_defconfig
@@ -0,0 +1,102 @@
+CONFIG_ARM=y
+CONFIG_ARCH_MX7=y
+CONFIG_SYS_THUMB_BUILD=y
+CONFIG_SYS_TEXT_BASE=0x87800000
+CONFIG_TARGET_MX7DSABRESD=y
+CONFIG_DEFAULT_DEVICE_TREE="imx7d-sdb"
+CONFIG_OF_CONTROL=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_SPL_OPTEE_BOOT=y
+CONFIG_ARMV7_BOOT_SEC_DEFAULT=y
+CONFIG_ARMV7_NONSEC=n
+# CONFIG_ARMV7_VIRT is not set
+CONFIG_BAUDRATE=115200
+CONFIG_BOOTDELAY=-2
+CONFIG_UEFI_BOOT=y
+CONFIG_UEFI_LOAD_ADDR=0x82004000
+# CONFIG_CMD_BMODE is not set
+# CONFIG_CMD_BOOTD is not set
+CONFIG_CMD_BOOTM=y
+CONFIG_CMD_BOOTZ=n
+# CONFIG_CMD_IMI is not set
+# CONFIG_CMD_XIMG is not set
+# CONFIG_CMD_EXPORTENV is not set
+# CONFIG_CMD_IMPORTENV is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_BMP=y
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_PMIC=y
+CONFIG_CMD_REGULATOR=y
+CONFIG_CMD_FAT=y
+CONFIG_CMD_PART=y
+CONFIG_CMD_FS_GENERIC=y
+CONFIG_CMD_SF=y
+# CONFIG_CONSOLE_MUX is not set
+CONFIG_SYS_CONSOLE_IS_IN_ENV=y
+CONFIG_DEBUG_UART_MXC=y
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_DEBUG_UART_BASE=0x30860000
+CONFIG_SPI=y
+CONFIG_DM_74X164=y
+CONFIG_DM_GPIO=y
+CONFIG_DM_I2C=y
+CONFIG_DM_MMC=y
+CONFIG_DM_PMIC_PFUZE100=y
+CONFIG_DM_PMIC=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_DM_REGULATOR_GPIO=y
+CONFIG_DM_REGULATOR_PFUZE100=y
+CONFIG_DM_REGULATOR=y
+CONFIG_DM_SERIAL=n
+CONFIG_DM_SPI=y
+CONFIG_DM_USB=y
+CONFIG_ERRNO_STR=y
+CONFIG_HUSH_PARSER=y
+CONFIG_IMX_BOOTAUX=y
+CONFIG_IMX_RDC=y
+CONFIG_MXC_USB_OTG_HACTIVE=y
+CONFIG_PHYLIB=y
+CONFIG_PINCTRL_IMX7=y
+CONFIG_PINCTRL=y
+CONFIG_SECURE_BOOT=y
+CONFIG_SPL_SYS_MALLOC_SIMPLE=y
+CONFIG_SOFT_SPI=y
+CONFIG_FSL_ESDHC=y
+CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH=y
+CONFIG_EFI_LOADER=n
+CONFIG_SPL=y
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_SPL_LEGACY_IMAGE_SUPPORT=n
+CONFIG_SPL_DM=n
+CONFIG_SPL_FIT=y
+CONFIG_SPL_OF_LIBFDT=y
+CONFIG_SPL_DM_SERIAL=n
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_USE_TINY_PRINTF=y
+CONFIG_SPL_USE_ARCH_MEMCPY=n
+CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_ENV_IS_IN_MMC=n
+CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx7dsabresd/imximage.cfg"
+CONFIG_SYS_MALLOC_F_LEN=0x0800
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x8A
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
+CONFIG_USB_FUNCTION_MASS_STORAGE=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_KEYBOARD=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB=y
+CONFIG_VIDEO_MXS=y
+CONFIG_VIDEO=y
+CONFIG_GLOBAL_PAGE=y
+CONFIG_STORE_MAC_IN_GLOBAL=y
+CONFIG_ETH1ADDR_IN_GLOBAL=y
+CONFIG_OF_LIBFDT=y
\ No newline at end of file
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
index f186120684..3fb9b72703 100644
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -7,10 +7,13 @@ ifndef CONFIG_SPL_BUILD
 obj-$(CONFIG_DWAPB_GPIO)	+= dwapb_gpio.o
 obj-$(CONFIG_AXP_GPIO)		+= axp_gpio.o
 endif
+
+ifeq ($(CONFIG_$(SPL_TPL_)DM),y)
 obj-$(CONFIG_DM_GPIO)		+= gpio-uclass.o
 
 obj-$(CONFIG_DM_PCA953X)	+= pca953x_gpio.o
 obj-$(CONFIG_DM_74X164)		+= 74x164_gpio.o
+endif
 
 obj-$(CONFIG_AT91_GPIO)	+= at91_gpio.o
 obj-$(CONFIG_ATMEL_PIO4)	+= atmel_pio4.o
diff --git a/drivers/pinctrl/nxp/pinctrl-imx7.c b/drivers/pinctrl/nxp/pinctrl-imx7.c
index 769d428dda..7ba97bae0d 100644
--- a/drivers/pinctrl/nxp/pinctrl-imx7.c
+++ b/drivers/pinctrl/nxp/pinctrl-imx7.c
@@ -9,7 +9,9 @@
 
 #include "pinctrl-imx.h"
 
-static struct imx_pinctrl_soc_info imx7_pinctrl_soc_info;
+static struct imx_pinctrl_soc_info imx7_pinctrl_soc_info = {
+	.flags = ZERO_OFFSET_VALID,
+};
 
 static struct imx_pinctrl_soc_info imx7_lpsr_pinctrl_soc_info = {
 	.flags = ZERO_OFFSET_VALID,
diff --git a/include/configs/mx7dsabresd.h b/include/configs/mx7dsabresd.h
index 87d2b52ef1..a6793927ef 100644
--- a/include/configs/mx7dsabresd.h
+++ b/include/configs/mx7dsabresd.h
@@ -9,6 +9,7 @@
 #define __MX7D_SABRESD_CONFIG_H
 
 #include "mx7_common.h"
+#include "imx7_spl.h"
 
 #define CONFIG_DBG_MONITOR
 #define PHYS_SDRAM_SIZE			SZ_1G
@@ -65,6 +66,14 @@
 #define UPDATE_M4_ENV ""
 #endif
 
+#ifdef CONFIG_UEFI_BOOT
+#include <config_uefi_bootcmd.h>
+
+#define CONFIG_EXTRA_ENV_SETTINGS \
+	"mmcdev=0\0" \
+	"console=ttymxc0\0" \
+	BOOTENV
+#else
 #define CONFIG_MFG_ENV_SETTINGS \
 	"mfgtool_args=setenv bootargs console=${console},${baudrate} " \
 		"rdinit=/linuxrc " \
@@ -161,6 +170,7 @@
 			   "fi; " \
 		   "fi; " \
 	   "else run netboot; fi"
+#endif /* CONFIG_UEFI_BOOT */
 
 #define CONFIG_SYS_MEMTEST_START	0x80000000
 #define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + 0x20000000)
-- 
2.16.2.gvfs.1.33.gf5370f1