From mboxrd@z Thu Jan 1 00:00:00 1970 From: Jagan Teki Date: Fri, 10 Aug 2018 11:36:56 +0530 Subject: [U-Boot] [PATCH v2 38/53] clk: sunxi: Implement SPI resets In-Reply-To: <20180810060711.6547-1-jagan@amarulasolutions.com> References: <20180810060711.6547-1-jagan@amarulasolutions.com> Message-ID: <20180810060711.6547-39-jagan@amarulasolutions.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Implement SPI resets for all relevant Allwinner SoC clock drivers via reset map descriptor table. Signed-off-by: Jagan Teki --- drivers/clk/sunxi/clk_a31.c | 4 ++++ drivers/clk/sunxi/clk_a64.c | 2 ++ drivers/clk/sunxi/clk_h3.c | 2 ++ drivers/clk/sunxi/clk_v3s.c | 1 + 4 files changed, 9 insertions(+) diff --git a/drivers/clk/sunxi/clk_a31.c b/drivers/clk/sunxi/clk_a31.c index 1fa77e1272..a5c6628c63 100644 --- a/drivers/clk/sunxi/clk_a31.c +++ b/drivers/clk/sunxi/clk_a31.c @@ -55,6 +55,10 @@ static struct ccu_reset_map a31_resets[] = { [RST_AHB1_MMC1] = { 0x2c0, BIT(9) }, [RST_AHB1_MMC2] = { 0x2c0, BIT(10) }, [RST_AHB1_MMC3] = { 0x2c0, BIT(11) }, + [RST_AHB1_SPI0] = { 0x2c0, BIT(20) }, + [RST_AHB1_SPI1] = { 0x2c0, BIT(21) }, + [RST_AHB1_SPI2] = { 0x2c0, BIT(22) }, + [RST_AHB1_SPI3] = { 0x2c0, BIT(23) }, [RST_AHB1_OTG] = { 0x2c0, BIT(24) }, [RST_AHB1_EHCI0] = { 0x2c0, BIT(26) }, [RST_AHB1_EHCI1] = { 0x2c0, BIT(27) }, diff --git a/drivers/clk/sunxi/clk_a64.c b/drivers/clk/sunxi/clk_a64.c index aa2e69d0a3..218d4f09ea 100644 --- a/drivers/clk/sunxi/clk_a64.c +++ b/drivers/clk/sunxi/clk_a64.c @@ -47,6 +47,8 @@ static struct ccu_reset_map a64_resets[] = { [RST_BUS_MMC0] = { 0x2c0, BIT(8) }, [RST_BUS_MMC1] = { 0x2c0, BIT(9) }, [RST_BUS_MMC2] = { 0x2c0, BIT(10) }, + [RST_BUS_SPI0] = { 0x2c0, BIT(20) }, + [RST_BUS_SPI1] = { 0x2c0, BIT(21) }, [RST_BUS_OTG] = { 0x2c0, BIT(23) }, [RST_BUS_EHCI0] = { 0x2c0, BIT(24) }, [RST_BUS_EHCI1] = { 0x2c0, BIT(25) }, diff --git a/drivers/clk/sunxi/clk_h3.c b/drivers/clk/sunxi/clk_h3.c index 386289b654..f610cee745 100644 --- a/drivers/clk/sunxi/clk_h3.c +++ b/drivers/clk/sunxi/clk_h3.c @@ -54,6 +54,8 @@ static struct ccu_reset_map h3_resets[] = { [RST_BUS_MMC0] = { 0x2c0, BIT(8) }, [RST_BUS_MMC1] = { 0x2c0, BIT(9) }, [RST_BUS_MMC2] = { 0x2c0, BIT(10) }, + [RST_BUS_SPI0] = { 0x2c0, BIT(20) }, + [RST_BUS_SPI1] = { 0x2c0, BIT(21) }, [RST_BUS_OTG] = { 0x2c0, BIT(23) }, [RST_BUS_EHCI0] = { 0x2c0, BIT(24) }, [RST_BUS_EHCI1] = { 0x2c0, BIT(25) }, diff --git a/drivers/clk/sunxi/clk_v3s.c b/drivers/clk/sunxi/clk_v3s.c index 1cca57e065..ae4f6ee066 100644 --- a/drivers/clk/sunxi/clk_v3s.c +++ b/drivers/clk/sunxi/clk_v3s.c @@ -34,6 +34,7 @@ static struct ccu_reset_map v3s_resets[] = { [RST_BUS_MMC0] = { 0x2c0, BIT(8) }, [RST_BUS_MMC1] = { 0x2c0, BIT(9) }, [RST_BUS_MMC2] = { 0x2c0, BIT(10) }, + [RST_BUS_SPI0] = { 0x2c0, BIT(20) }, [RST_BUS_OTG] = { 0x2c0, BIT(24) }, }; -- 2.18.0.321.gffc6fa0e3