From mboxrd@z Thu Jan 1 00:00:00 1970 From: Maxime Ripard Date: Mon, 27 Aug 2018 17:02:31 +0200 Subject: [U-Boot] [PATCH v4 12/17] clk: sunxi: Add Allwinner V3S CLK driver In-Reply-To: <20180826123826.19243-13-jagan@amarulasolutions.com> References: <20180826123826.19243-1-jagan@amarulasolutions.com> <20180826123826.19243-13-jagan@amarulasolutions.com> Message-ID: <20180827150231.xd7vauuaej67wmr2@flea> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On Sun, Aug 26, 2018 at 06:08:21PM +0530, Jagan Teki wrote: > Add initial clock driver for Allwinner V3S. > > - Implement USB bus and USB clocks via ccu_clk_map descriptor > for V3S, so it can accessed in common clk enable and disable > functions from clk_sunxi.c > - Implement USB bus and USB resets via ccu_reset_map descriptor > for V3S, so it can accessed in common reset deassert and assert > functions from reset-sunxi.c > > Signed-off-by: Jagan Teki Acked-by: Maxime Ripard Maxime -- Maxime Ripard, Bootlin Embedded Linux and Kernel engineering https://bootlin.com -------------- next part -------------- A non-text attachment was scrubbed... Name: signature.asc Type: application/pgp-signature Size: 833 bytes Desc: not available URL: