From mboxrd@z Thu Jan 1 00:00:00 1970 From: Lothar =?UTF-8?B?V2HDn21hbm4=?= Date: Thu, 13 Sep 2018 17:55:37 +0200 Subject: [U-Boot] [PATCH V4 32/32] imx: add i.MX8QXP MEK board support In-Reply-To: <20180905021219.12828-33-peng.fan@nxp.com> References: <20180905021219.12828-1-peng.fan@nxp.com> <20180905021219.12828-33-peng.fan@nxp.com> Message-ID: <20180913175537.67683c88@karo-electronics.de> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="windows-1252" Content-Transfer-Encoding: quoted-printable To: u-boot@lists.denx.de Hi, On Wed, 5 Sep 2018 10:12:19 +0800 Peng Fan wrote: > Add i.MX8QXP MEK board support > Enabled pinctrl/clk/power domain/mmc/i2c driver. > Added README file. >=20 > Signed-off-by: Peng Fan > Cc: Stefano Babic > Cc: Fabio Estevam > Cc: Anatolij Gustschin > --- > arch/arm/dts/Makefile | 2 + > arch/arm/dts/fsl-imx8qxp-mek.dts | 136 ++++++++++++++++++++++++= ++ > arch/arm/mach-imx/imx8/Kconfig | 13 +++ > board/freescale/imx8qxp_mek/Kconfig | 14 +++ > board/freescale/imx8qxp_mek/MAINTAINERS | 6 ++ > board/freescale/imx8qxp_mek/Makefile | 7 ++ > board/freescale/imx8qxp_mek/README | 72 ++++++++++++++ > board/freescale/imx8qxp_mek/imx8qxp_mek.c | 152 ++++++++++++++++++++++++= +++++ > board/freescale/mx8mq_evk/README | 81 ++++++++++++++++ > configs/imx8qxp_mek_defconfig | 38 ++++++++ > include/configs/imx8qxp_mek.h | 156 ++++++++++++++++++++++++= ++++++ > 11 files changed, 677 insertions(+) > create mode 100644 arch/arm/dts/fsl-imx8qxp-mek.dts > create mode 100644 board/freescale/imx8qxp_mek/Kconfig > create mode 100644 board/freescale/imx8qxp_mek/MAINTAINERS > create mode 100644 board/freescale/imx8qxp_mek/Makefile > create mode 100644 board/freescale/imx8qxp_mek/README > create mode 100644 board/freescale/imx8qxp_mek/imx8qxp_mek.c > create mode 100644 board/freescale/mx8mq_evk/README > create mode 100644 configs/imx8qxp_mek_defconfig > create mode 100644 include/configs/imx8qxp_mek.h >=20 > diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile > index ebfa227262..8df85f3987 100644 > --- a/arch/arm/dts/Makefile > +++ b/arch/arm/dts/Makefile > @@ -449,6 +449,8 @@ dtb-$(CONFIG_MX7) +=3D imx7-colibri.dtb \ > =20 > dtb-$(CONFIG_ARCH_MX7ULP) +=3D imx7ulp-evk.dtb > =20 > +dtb-$(CONFIG_ARCH_IMX8) +=3D fsl-imx8qxp-mek.dtb > + > dtb-$(CONFIG_RCAR_GEN3) +=3D \ > r8a7795-h3ulcb.dtb \ > r8a7795-salvator-x.dtb \ > diff --git a/arch/arm/dts/fsl-imx8qxp-mek.dts b/arch/arm/dts/fsl-imx8qxp-= mek.dts > new file mode 100644 > index 0000000000..5443ef7e4e > --- /dev/null > +++ b/arch/arm/dts/fsl-imx8qxp-mek.dts > @@ -0,0 +1,136 @@ > +// SPDX-License-Identifier: GPL-2.0+ > +/* > + * Copyright 2017-2018 NXP > + */ > + > +/dts-v1/; > + > +#include "fsl-imx8qxp.dtsi" > + > +/ { > + model =3D "Freescale i.MX8QXP MEK"; > + compatible =3D "fsl,imx8qxp-mek", "fsl,imx8qxp"; > + > + chosen { > + bootargs =3D "console=3DttyLP0,115200 earlycon=3Dlpuart32,0x5a060000,1= 15200"; > + stdout-path =3D &lpuart0; > + }; > + > + regulators { > + compatible =3D "simple-bus"; > + > + reg_usdhc2_vmmc: usdhc2_vmmc { > Node names should have '-' rather than '_'. > + compatible =3D "regulator-fixed"; > + regulator-name =3D "SD1_SPWR"; > + regulator-min-microvolt =3D <3000000>; > + regulator-max-microvolt =3D <3000000>; > + gpio =3D <&gpio4 19 GPIO_ACTIVE_HIGH>; > + off-on-delay =3D <3480>; > + enable-active-high; > + }; > regulators should not have a 'simple-bus' container. When keeping the simple-bus container the individual regulator nodes require node addresses and 'reg' properties, and the enclosing simple-bus container requires #address-cells and #size-cells properties. > + > +&iomuxc { > + pinctrl-names =3D "default"; > + pinctrl-0 =3D <&pinctrl_hog>; > + > + imx8qxp-mek { > + pinctrl_hog: hoggrp { > + fsl,pins =3D < > + SC_P_MCLK_OUT0_ADMA_ACM_MCLK_OUT0 0x0600004c > + SC_P_COMP_CTL_GPIO_1V8_3V3_GPIORHB_PAD 0x000514a0 > + >; > + }; > + > + pinctrl_ioexp_rst: ioexp_rst_grp { > Node names should have '-' rather than '_'. > + fsl,pins =3D < > + SC_P_SPI2_SDO_LSIO_GPIO1_IO01 0x06000021 > + >; > + }; > + > + pinctrl_lpi2c1: lpi1cgrp { > + fsl,pins =3D < > + SC_P_USB_SS3_TC1_ADMA_I2C1_SCL 0x06000021 > + SC_P_USB_SS3_TC3_ADMA_I2C1_SDA 0x06000021 > + >; > + }; > + > + pinctrl_lpuart0: lpuart0grp { > + fsl,pins =3D < > + SC_P_UART0_RX_ADMA_UART0_RX 0x06000020 > + SC_P_UART0_TX_ADMA_UART0_TX 0x06000020 > + >; > + }; > + > + pinctrl_usdhc1: usdhc1grp { > + fsl,pins =3D < > + SC_P_EMMC0_CLK_CONN_EMMC0_CLK 0x06000041 > + SC_P_EMMC0_CMD_CONN_EMMC0_CMD 0x00000021 > + SC_P_EMMC0_DATA0_CONN_EMMC0_DATA0 0x00000021 > + SC_P_EMMC0_DATA1_CONN_EMMC0_DATA1 0x00000021 > + SC_P_EMMC0_DATA2_CONN_EMMC0_DATA2 0x00000021 > + SC_P_EMMC0_DATA3_CONN_EMMC0_DATA3 0x00000021 > + SC_P_EMMC0_DATA4_CONN_EMMC0_DATA4 0x00000021 > + SC_P_EMMC0_DATA5_CONN_EMMC0_DATA5 0x00000021 > + SC_P_EMMC0_DATA6_CONN_EMMC0_DATA6 0x00000021 > + SC_P_EMMC0_DATA7_CONN_EMMC0_DATA7 0x00000021 > + SC_P_EMMC0_STROBE_CONN_EMMC0_STROBE 0x00000041 > + >; > + }; > + > + pinctrl_usdhc2_gpio: usdhc2gpiogrp { > + fsl,pins =3D < > + SC_P_USDHC1_RESET_B_LSIO_GPIO4_IO19 0x00000021 > + SC_P_USDHC1_WP_LSIO_GPIO4_IO21 0x00000021 > + SC_P_USDHC1_CD_B_LSIO_GPIO4_IO22 0x00000021 > + >; > + }; > + > + pinctrl_usdhc2: usdhc2grp { > + fsl,pins =3D < > + SC_P_USDHC1_CLK_CONN_USDHC1_CLK 0x06000041 > + SC_P_USDHC1_CMD_CONN_USDHC1_CMD 0x00000021 > + SC_P_USDHC1_DATA0_CONN_USDHC1_DATA0 0x00000021 > + SC_P_USDHC1_DATA1_CONN_USDHC1_DATA1 0x00000021 > + SC_P_USDHC1_DATA2_CONN_USDHC1_DATA2 0x00000021 > + SC_P_USDHC1_DATA3_CONN_USDHC1_DATA3 0x00000021 > + SC_P_USDHC1_VSELECT_CONN_USDHC1_VSELECT 0x00000021 > + >; > + }; > + }; > +}; > + > +&lpuart0 { > + pinctrl-names =3D "default"; > + pinctrl-0 =3D <&pinctrl_lpuart0>; > + status =3D "okay"; > +}; > + > +&i2c1 { > + #address-cells =3D <1>; > + #size-cells =3D <0>; > These should be defined in the dtsi file where the i2c1 node is defined, rather than having each user define those properties. Lothar Wa=C3=9Fmann