From mboxrd@z Thu Jan 1 00:00:00 1970 From: Marty E. Plummer Date: Thu, 13 Sep 2018 16:55:32 -0500 Subject: [U-Boot] [PATCH v2 2/2] rockchip: fix incorrect detection of ram size In-Reply-To: <20180913215532.30347-1-hanetzer@startmail.com> References: <20180913215532.30347-1-hanetzer@startmail.com> Message-ID: <20180913215532.30347-2-hanetzer@startmail.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Taken from coreboot's src/soc/rockchip/rk3288/sdram.c Without this change, my u-boot build for the asus c201 chromebook (4GiB) is incorrectly detected as 0 Bytes of ram. Signed-off-by: Marty E. Plummer --- arch/arm/mach-rockchip/sdram_common.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/mach-rockchip/sdram_common.c b/arch/arm/mach-rockchip/sdram_common.c index 650d53e4d9..194dc74b9f 100644 --- a/arch/arm/mach-rockchip/sdram_common.c +++ b/arch/arm/mach-rockchip/sdram_common.c @@ -48,6 +48,8 @@ size_t rockchip_sdram_size(phys_addr_t reg) rank, col, bk, cs0_row, bw, row_3_4); } + size_mb = min(size_mb, SDRAM_MAX_SIZE/SZ_1M); + return (size_t)size_mb << 20; } -- 2.18.0