From mboxrd@z Thu Jan 1 00:00:00 1970 From: Miquel Raynal Date: Mon, 29 Oct 2018 10:29:35 +0100 Subject: [U-Boot] [PATCH] mtd: nand: lpc32xx mlc: predefine number of NAND chips to support In-Reply-To: <20181019002105.4620-1-vz@mleia.com> References: <20181019002105.4620-1-vz@mleia.com> Message-ID: <20181029102935.35d6710d@xps13> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable To: u-boot@lists.denx.de Hi Vladimir, Vladimir Zapolskiy wrote on Fri, 19 Oct 2018 03:21:05 +0300: > Build option CONFIG_SYS_MAX_NAND_CHIPS is used by NXP LPC32xx NAND MLC > driver only, as a preparation for potential removal or replacement of > the option the change predefines CONFIG_SYS_MAX_NAND_CHIPS to 1, same > value is used by the single user Work Microwave Work 92105 board, thus > it will be safe now to remove the option as a board specific one. >=20 > Signed-off-by: Vladimir Zapolskiy > --- > drivers/mtd/nand/raw/lpc32xx_nand_mlc.c | 4 ++++ > 1 file changed, 4 insertions(+) >=20 > diff --git a/drivers/mtd/nand/raw/lpc32xx_nand_mlc.c b/drivers/mtd/nand/r= aw/lpc32xx_nand_mlc.c > index 5d4ffea608d9..79d1489dc72c 100644 > --- a/drivers/mtd/nand/raw/lpc32xx_nand_mlc.c > +++ b/drivers/mtd/nand/raw/lpc32xx_nand_mlc.c > @@ -82,6 +82,10 @@ struct lpc32xx_nand_mlc_registers { > static struct lpc32xx_nand_mlc_registers __iomem *lpc32xx_nand_mlc_regis= ters > =3D (struct lpc32xx_nand_mlc_registers __iomem *)MLC_NAND_BASE; > =20 > +#if !defined(CONFIG_SYS_MAX_NAND_CHIPS) > +#define CONFIG_SYS_MAX_NAND_CHIPS 1 > +#endif > + > #define clkdiv(v, w, o) (((1+(clk/v)) & w) << o) > =20 > /** If it is safe now, can you also remote the CONFIG_ option now? Reviewed-by: Miquel Raynal Thanks, Miqu=C3=A8l